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ADS 1191 - Write Register

Other Parts Discussed in Thread: MSP430F2619

Dear TI Community, 

I have some troubles with my ADS 1191. I want to sample an ecg signal (channel 1) with a sampling frequency of 250sps. The data will be transferred via SPI to my MSP430F2619.

The SPI configuration: 

- SCLK: 1 MHz

- MOSI, MISO, PWDN, CS, START, CLKSEL are connected according to data sheet

I have the following problems: 

I initialized the ADC according to the Start-up Sequence. I assume everything works fine until I would like to write the register because DRDY toogles at 500sps during reset pulse. Then I want to write the registers with the following configs: 

- 250sps, CH1, normal measurement, Gain 1, Internal Reference 4.033 V and so on

Unfortunately there are some troubles to write the registers because after I am starting a mesurement I got /DRDY with 250 sps and noising. I tried to change the register values, but there are no changes. I tried to reset default config´s, but it didin´t work.

I checked my code, checked the SPI config (including Polarity and clock), the data converter starts, /DRDY toggles, SDATAC is okay, time delay during initialization is okay. But I can not write my registers. 

That´s why I want to ask you: Did I missunterstand something or are there some faults during writing my registers? Did I make some faults during reset or why can I not reset this data converter. 

On the following lines I posted my code. 

I am looking forward to hearing from you. Thanks a lot. 

Cheers, 

Stefan 

Here is my code:

void InitSPI_ADC()
{
UCA0CTL1 = UCSWRST;

P3SEL |= 0xF1; // Select
P3DIR |= (SPISCLK_A + SPISIMO_A+0x40); // Output
P3DIR &=~ (SPISOMI_A + 0x80); // Input

UCA0CTL0 = UCMST + UCMSB + UCSYNC; // 3-Pin SPI, MSB First, master, synchronous
UCA0CTL0 &=~ UCCKPL; // Inactive Status low
UCA0CTL0 &=~ UCCKPH; // Inverted CPHA
UCA0CTL1 = UCSSEL_2; // SMCLK
UCA0BR0 = 0x01; // SMCLK - Baudrate
UCA0BR1 = 0;
UCA0MCTL = 0; // No modulation
UCA0CTL1 &=~(UCSWRST); // USART state machine 
}

unsigned char WriteSPI(unsigned char command)
{
IFG2 &= ~(UCA0TXIFG | UCA0RXIFG); // Delete Flags

UCA0TXBUF = command; // send the data
while ((IFG2 & UCA0TXIFG) == 0); // wait for transmit buffer

__delay_cycles(4);
}

#define DRDY 0x01 // P2.0 -- 20 //
#define CS 0x02 // P2.1 -- 21 //
#define START 0x04 // P2.2 -- 22 //
#define PWDN 0x08 // P2.3 -- 23 //
#define CLKSEL 0x10 // P2.4 -- 24 //
//
/*---------------------------------------------------------------------------------------------------------*/

/*--------------------------------------- SPI - ADC -------------------------------------------------------*/
//
#define SPISCLK_A 0x01 // P3.0 -- 28 //
#define SPISIMO_A 0x10 // P3.4 -- 32 //
#define SPISOMI_A 0x20 // P3.5 -- 33

void InitADC(){

P2OUT |= CLKSEL; // CLKSEL = 1, Internal Clock from ADS
P2OUT |= START;
__delay_cycles(T1_200ms);

P2OUT |= PWDN; // PWDN = 1;
//P2OUT &= ~PWDN; // Reset Pulse

__delay_cycles(2002000);

/*__delay_cycles(T1_200ms); __delay_cycles(T1_200ms); // Wait one seconde
__delay_cycles(T1_200ms); __delay_cycles(T1_200ms); // Wait for Oscillator to wake-up
__delay_cycles(T1_200ms); __delay_cycles(T1_200ms);
*/
P2OUT &= ~CS;

P2OUT &= ~PWDN;
__delay_cycles(8);
P2OUT |= PWDN;
// CS = 0; Allow Command

__delay_cycles(8000);


WriteSPI(0x11); // SDATAC Command
__delay_cycles(20);

WriteSPI(0x42); // Internal Reference (4.033 V) used
WriteSPI(0x00);
WriteSPI(0xB0);

/*__delay_cycles(T1_200ms); __delay_cycles(T1_200ms); // Wait for internal reference stabilisation
__delay_cycles(T1_200ms); __delay_cycles(T1_200ms);
*/
__delay_cycles(8);
WriteSPI(0x41); // Continous Conversion mode 250 SPS
WriteSPI(0x00);
WriteSPI(0x02);

__delay_cycles(8);
WriteSPI(0x43); // Lead-Off Control
WriteSPI(0x00);
WriteSPI(0x10);

__delay_cycles(8);
WriteSPI(0x44); // Channel 1 Settings
WriteSPI(0x00); // GAIN = 1
WriteSPI(0x10); // Normal Mode

__delay_cycles(8);
WriteSPI(0x45); // Channel 2 Settings
WriteSPI(0x00); // GAIN = 1
WriteSPI(0x80); // Power Down

__delay_cycles(8);
WriteSPI(0x46); // Right Leg Drive Sense Selection
WriteSPI(0x00);
WriteSPI(0x00);

__delay_cycles(8);
WriteSPI(0x47); // Lead-Off Sense Selection
WriteSPI(0x00);
WriteSPI(0x00);

__delay_cycles(8);
WriteSPI(0x48); // Lead-Off Status
WriteSPI(0x00);
WriteSPI(0x1C);

__delay_cycles(8);
WriteSPI(0x4A); // MISC 1
WriteSPI(0x00);
WriteSPI(0x02); // Command 0x02h

__delay_cycles(8);
WriteSPI(0x49); // MISC 2
WriteSPI(0x00);
WriteSPI(0x00);

__delay_cycles(8);
WriteSPI(0x4B); // GPIO
WriteSPI(0x00);
WriteSPI(0x00);

__delay_cycles(20);

WriteSPI(0x10); // RDATAC
__delay_cycles(8);
P2OUT |= CS; // CS = 1; Deactivate Command

}