Dear Sir/Madam,
I have a question regarding DDC264 power up sequencing: in the DDC264 spec (SBAS368C –MAY 2006–REVISED JULY 2011) Figure 33 Page 20, after "Strobe CONV", it becomes normal operation. At that time CONV is low:
1) at that time (CONV at low), have all the integrators started integration at the falling edge of the CONV?
2) If the integration time is too long, any damage or harm to the DDC264?Will the integration capacitor be reversely charged? will the AD (measurement) report a full scale number in that case or will report a random number?
Thanks,
Ron