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Reference crosstalk in DAC8803 Multiplying Converter

Dave Mate
Prodigy 90 points
Other Parts Discussed in Thread: OPA1664

Hello,

I am using the 14 bit multiplying DAC in an audio application and a fine part it is too by golly.

However I am not realizing the full attenuation at 20 KHz that the graph on page 10 of my data sheet

entitled "reference multiplying bandwidth" promises. For example, if one writes 0010 H into the part, then an attenuation

of -60 dBr should be obtained up to a frequency of 100 KHz or so when capacitance across the part provides

some feedthrough, the graph suggests that about 2 dB will be lost giving an attenuation of -58 dB.

My problem is by the time I get to 20 KHz I am only seeing -54 dB of attenuation. I realize that this is a small

amount of capacitance - my calculation says that is equivalent to about 3.1 pF. I have looked at the pcb layout

and using a rough rule that 1 sq inch at 10thou gap = 100 pF, there is no way that the pcb could account for this

stray capacitance so I have to suspect the part itself. There is a work around that involves neutralizing the 3.1 pf stray with

an external capacitor driven in anti-phase but that is tricky and one would rather the part just performed as advertised.

I am wondering about that pin labeled "VSS" which my data sheet says has no internal connection. If that really

is the substrate of the die, as the name suggests, than leaving it floating as I have done, might cause this crosstalk that

I am seeing. I could try to connect it capacitively to the -15V analog rail ? Any advice would be most appreciated.

Thanks

Dave M

  • 0
    TI__Genius 10615 points

    Hello Dave,

     

    Connecting the VSS pin to a negative voltage will not make a difference. It is not connected to the substrate and is actually a No Connect.

    I order to better assess the situation I have a few questions. In general, the difference in attenuation seems excessive to be a device capacitance issue.

    • What attenuation do you observe at lower frequencies (1kHz or 100Hz)? I want to check that the correct code is being read by the device.
    • What attenuation do you observe at Code 0x0020?
    • What amplifier are you using for the trans-impedance stage?
    • Can you check the input signal at the pin to check for drooping? This is not expected at lower frequencies, but it doesn’t hurt to check.

    A schematic may help in debugging this issue.

  • 0 in reply to Eugenio Mejia
    Prodigy 90 points

    Hello Eugenio,

    The DAC is used as an attenuator in the feedback loop of a mic amp. Basically, the mic amp has a gain equal to the inverse of the

    attenuation. Audio Precision frequency response plots show 60 dB of gain at 100 Hz and 1KHz and -6 dB at 20 KHz.

    There could be two causes:

    A) The forward path runs out of open loop gain bandwidth product

    B) There is capactive feed forward around the DAC

    I don't think it is the forward path running out of open loop gain but I'll take a closer look at that. All the op-amps used in this circuit are OPA1664.

    The main forward path is one section of the OPA1664 with 8 low noise Toshiba transistors preceeding it with a fixed differential voltage gain of 20 dB.

    The transimpedance stage is one of the OPA1664 sections.

    I have extensively simulated the circuit over all but I had to make up a model for the DAC because I believe there isn't an AC model for the device,

    only a DC model that I could use in a transient analysis, so I model it as a multiplier driving a voltage controlled current source and I account for the

    phenomenon that I actually see with a 3 pF capacitor around the DAC model. I use 5K ohms as the modelled Rfeedback inside the DAC.

    Obviously most of that would need a schematic to make it make sense but I can't put up a PDF for public display as the unusual topology is the subject

    of pending patent applications, granted here in the UK, but I am not sure about the US. I could send a fragment via email I guess, but:

    As I said, I have a workaround involving placing a small capacitor around the DAC and driving it in antiphase.

    I determined it empirically by cutting a pair of twisted wires until I got a nearly flat frequency response. The added capacitance measured about 2 pF.

    Thank you for answering my question about the Vss pin but why is it there? Why doesn't the data sheet just mark it as no connect?

    Thank you overall for assuring me the DAC will meet it's specs and so I'll go back and look for other causes - even though I think the forward path

    retains at least 80 dB of positive gain at 20 KHz, maybe it doesn't.

  • 0 in reply to Dave Mate
    TI__Genius 10615 points

    Hi Dave,

    I think we are going to need a partial capture of your schematic.

    Is it okay to use the listed email address in your profile?

    To answer your question about the VSS pin. Early in the design a VSS pin was thought necessary, but as the project progressed the VSS pin was dropped. The naming convention was kept.

  • 0 in reply to Eugenio Mejia
    Prodigy 90 points

    Yes,

    that is my email at work,

    Dave

  • 0 in reply to Dave Mate
    TI__Mastermind 46290 points

    This thread was taken offline and closed.