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Cabling and Signal Conditioning for serial PCB connections

Brian Willoughby
Genius 4630 points
Other Parts Discussed in Thread: ADS7953, ADS7951, TMS320VC5506

Are there any Application Notes which discuss design recommendations for cabling choices and signal conditioning when connecting serial data between boards?

I am working with the ADS7951 and ADS7953 on a board with the TMS320VC5506.  These converters have a maximum clock rate of 20 MHz and a maximum sampling rate of 1 MHz.  For my application, 18 MHz is the closest that the clock generation can obtain, and fortunately this is sufficient to still meet the 1 MHz sample rate.  Everything tests fine with all parts on the same board.

My question is how much I should design onto the boards if I want to move the ADS7951 parts to another board, separate from the C5506.  Would twisted pair be needed?  What about 16-conductor flex cable and Hirose flip-lock connectors?  Is 18 MHz anything to worry about?

I suppose that I could glean some guidance from the schematics for various evaluation boards, but those do not generally give specifications as to whether they support the full 20 MHz serial interface.

I'm hoping that Texas Instruments has addressed some of these questions in an Application Note that I could easily download.

  • 0
    TI__Guru**** 180741 points

    Hi again Brian,

    How long does the interconnect need to be?  We've done some tests here that show you can run about 3 feet of twisted pair cable from a 20MHz SPI master to a slave device before you start to loose data.  Normal SPI processors depend on the phase relationship of data to master clock being the same at both ends.  Once your transmission line (down and back) gets to the point where your delay is 1/2 a clock cycle, data becomes corrupted.  Our ADS7951/53EVM runs with a C5509 (see the ADS7953EVM-PDK) using a 20MHz clock with Samtec TSM/SSW series headers/sockets and we've never had any trouble with it over maybe four to five  inches of trace (roughly two inches on each side of the Samtec headers).

    All clocking and interconnections have some concerns with cross talk, EMI, reflections, etc.  Even applications where the signals are 'only' 18MHz still need to follow some basic best practice type design guidelines so you should at least do the due diligence to ensure you'll have as little to worry about as possible.  Here is an app note with some basic guidelines for your review - http://focus.ti.com/lit/an/scaa082/scaa082.pdf

    Hopefully you'll find this useful.  Samtec also has some good technical briefs on signal integrity that you might find useful: http://www.samtec.com/technical_library/Application_Notes.aspx

  • 0 in reply to Tom Hendrick
    Genius 4630 points

    The longer interconnect will probably be 16" to 18" - In comparison, if I'm doing the math correctly, 1/4 wavelength at 18 MHz would be around 12 or 13 feet.  Seems like we'll be safe, and we'll certainly test prototypes before manufacturing.

    Due to size constraints on the connector, we'd like to use Hirose connectors and FPC cable.  I don't know if that allows for twisted pair, nor do I know whether twisted pair would even be needed with our cable lengths.  At the very least, I can design for guard signals on every other line of the FPC to minimize crosstalk.  I suppose I could also add differential buffers if necessary, even if the cabling isn't twisted (which would be optimal).

    Thanks for the references - layout is certainly important.  I looked at the ADS79xxEVM schematic, and see that there is no buffering or signal processing of any kind between the ribbon header and the ADS79xx chip.  I could not find schematics for the MMB0 board on the other end, where I'm curious to know whether the serial lines are also unbuffered or perhaps all the conditioning is done on that end.

  • 0 in reply to Brian Willoughby
    TI__Guru**** 180741 points

    Sounds like you'll be fine.  For the MMB0, there is a level shifting buffer between the DSP and the serial header - mainly to protect the processor from anyone sending 5V signals into the I/O pins, no real 'drivers' though.

    Keep us posted and let us know how you make out with the new hardware.

  • 0 in reply to Tom Hendrick
    Genius 4630 points

    I am following up as requested.  The 6" flex cable and Hirose connectors seem to allow flawless I/O from my TMS320VC5506 Main Board to the two ADS7951 chips, each on a separate board.  I have experienced no communication errors at all.  In fact, to the firmware, it appears that these chips are working as well on a separate board as they were on the initial prototype boards where all chips were on the same board.

    I am having some analog problems, because the conversion results are not what I would expect.  These issues are detailed in another thread, but I have no reason to suspect that they have anything to do with moving the chips to a separate board via digital cabling.

    Thanks for the support, especially with the references to the MMB0 circuits.  I did not use any active buffers, but instead followed advice to design the PCB for simple RC filtering in case the signal busses need conditioning.  At the moment, I am not using any capacitance, and the inline resistors are 0 Ohm jumpers, so I haven't needed anything fancy.  It's nice to know that I have the option without a circuit revision, though.