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TVP5147: TVP5147M1_v070300 patch code download - CRC issue

Other Parts Discussed in Thread: TVP5147M1, TVP5147

Hello TI teams!

I works with dvr-rdk on Mistral EVM with DM8148 processor and TVP5147 video decoder. I tried to download RAM code for this decoder (from file TVP5147M1_v070300) - download completed successfully. I have a correct patch release version from ROM/RAM versions registers. But when I tried to set enable Run CRC - I always have "CRC was not performed" bit.

This is my functions that performed download patch via VBUS. Please let me know what is wrong?

 

////////////////////////////////////////////

Int32 device_tvp5147DownloadViaVBus (Device_Tvp5147Obj* pObj, const UInt8* pFirmware, const UInt32 firmwareSize)

{

                Int32 status = 0;

                UInt8 regAddr[1024] = {0};

                UInt8 regValues[1024] = {0};

                UInt8 numRegs = 0;

    UInt8 *patchAddr = NULL;

                UInt32 patchSize = 0u;

    UInt32 wrSize = 0u;

               

               

                UInt8 crc_status = 0x00;

                Device_VideoDecoderCreateParams* pCreateArgs = &pObj->createArgs;

               

                const char crc_status_str [][16] = {          

                                "NOT PERFORMED",

                                "PASS",

                                "UNKNOWN",

                                "FAIL",

                };

               

                if (NULL == pFirmware || 0u == firmwareSize) {

                                OSA_assert (NULL != pFirmware && 0u != firmwareSize);

                                return -1;

                }

               

                // place the CPU into reset

                numRegs = 0;

               

                regAddr[numRegs] = 0xE8;

                regValues[numRegs] = 0x60;

                numRegs++;

               

                regAddr[numRegs] = 0xE9;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xEA;

                regValues[numRegs] = 0xB0;

                numRegs++;

               

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

               

               

                // set teh RESET bit

                numRegs = 0;

               

                regAddr[numRegs] = 0xE0;

                regValues[numRegs] = 0x01;

                numRegs++;

 

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

               

               

                // set the VBUS to the beginning of program RAM

                numRegs = 0;

               

                regAddr[numRegs] = 0xE8;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xE9;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xEA;

                regValues[numRegs] = 0x40;

                numRegs++;

               

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

               

                               

                // load the RAM code

                patchAddr = (UInt8*)pFirmware;

                patchSize = firmwareSize;

               

    memset (regAddr, 0xE1, sizeof(regAddr));

               

                while (patchSize) {

                               

                                if (patchSize < sizeof(regAddr)) {

                                                wrSize = patchSize;

                                } else {

                                                wrSize = sizeof(regAddr);

                                }

 

                                status = OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, patchAddr, wrSize);

 

                                if (status < 0) {

#ifdef TVP5147_PRINT_DEBUG

                                printf ("TVP5147: RAM patch load error %d\n", status);

#endif

                                                break;

                                }

 

                                patchAddr += wrSize;

                                patchSize -= wrSize;

                }

               

               

                // set the RAM loaded bit

                numRegs = 0;

                regAddr[numRegs] = 0xE8;

                regValues[numRegs] = 0x60;

                numRegs++;

               

                regAddr[numRegs] = 0xE9;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xEA;

                regValues[numRegs] = 0xB0;

                numRegs++;

               

                regAddr[numRegs] = 0xE0;

                regValues[numRegs] = 0x03;

                numRegs++;

               

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

                 

               

                // set test CRC status

                numRegs = 0;

                regAddr[numRegs] = 0xE8;

                regValues[numRegs] = 0x63;

                numRegs++;

               

                regAddr[numRegs] = 0xE9;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xEA;

                regValues[numRegs] = 0xB0;

                numRegs++;

               

                regAddr[numRegs] = 0xE0;

                regValues[numRegs] = 0x04;

                numRegs++;

 

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

               

                // release the CPU reset

                numRegs = 0;

                regAddr[numRegs] = 0xE8;

                regValues[numRegs] = 0x60;

                numRegs++;

               

                regAddr[numRegs] = 0xE9;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xEA;

                regValues[numRegs] = 0xB0;

                numRegs++;

               

                regAddr[numRegs] = 0xE0;

                regValues[numRegs] = 0x02;

                numRegs++;

               

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

 

                // waits some time till CPU released from reset and perform CRC test of firmware

                usleep (100000);

               

                // test CRC status

                numRegs = 0;

                regAddr[numRegs] = 0xE8;

                regValues[numRegs] = 0x63;

                numRegs++;

               

                regAddr[numRegs] = 0xE9;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0xEA;

                regValues[numRegs] = 0xB0;

                numRegs++;

               

                status |= OSA_i2cWrite8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

               

                numRegs = 0;

                regAddr[numRegs] = 0xE0;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                status |= OSA_i2cRead8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

                crc_status = regValues[0] & 0x03u;

 

                // check patch version

                numRegs = 0;

                regAddr[numRegs] = 0x70;

                regValues[numRegs] = 0x00u;

                numRegs++;

               

                regAddr[numRegs] = 0x71;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                regAddr[numRegs] = 0x82;

                regValues[numRegs] = 0x00;

                numRegs++;

               

                status |= OSA_i2cRead8 (&pObj->i2cHandle, pCreateArgs->deviceI2cAddr[0], regAddr, regValues, numRegs);

               

                if (TVP_OK == status) {

                                                printf ("TVP5147: patch release = v%02d.%02d.%02d. crc status = %d [%s]\n",

                                                                                regValues[0], regValues[1], regValues[2], crc_status, crc_status_str[crc_status]);

                }

               

                                 

#ifdef TVP5147_PRINT_DEBUG

                                printf ("TVP5147: RAM patch downloaded with status %d [patch size = %u]\n",

                                                                status, firmwareSize);

#endif

               

                return status;

}

 

////////////////////////////////////////////

 

After call of this function I have next print::

TVP5147: patch release = v07.03.00. crc status = 0 [NOT PERFORMED]

 

Please help me to fix the problem with CRC test. I'll would be glad for any advice.

 

And second question please - what is differences between TVP5147 patches "TVP5147M1_v070300" and "TVP5147M1_v070301"?

 

ThanX alot for your helps :-)