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ADS8363 for 400 kHz signals

Jason Fritz
Prodigy 20 points
Other Parts Discussed in Thread: ADS8363

Hi,

I'm shopping for ADCs to digitize 4 400 kHz differential signals simultaneously (although they don't have to be exactly simultaneous). I looked through the ADS8363, but it wasn't clear if this will work, especially since no analog input bandwidth was specified and the plots vs. fin end at 50 kHz.

1. Can the ADS8363 sample *at least* 2 400 kHz differential signals at 1 Msps each using 1 input to each internal ADC (fully differential modem but only 1 signal into each MUX)? Can it sample 4? If not, I'll just use 2 chips.

2. I'm assuming that the input MUX will result in effectively half the sampling rate per channel, i.e., 500 ksps each. Is that correct? 

3. Any chance of getting SINAD, SFDR, and THD curves out to 400 kHz?

4. I want to process the output with a DSP, but it's not clear what the serial port requirements are on the DSP side to make sure I select one that is compatible. I think I can get by with 1 DSP (or I'll end up going the FPGA route). What interfaces are required for the DSP to connect the ADS8363?

Thanks!

  • 0
    TI__Guru**** 180821 points

    Hi Jason,

    There are two independent converter paths inside the ADS8363 so if you use both serial outputs (SDOA and SDOB) you can convert two 400K signals at 1MSPS.  As you suspect, if you continuously switch between inputs 0/1 on the A/B channel pairs, the effective conversion rate is only 500K/CH. 

    The easiest way to interface this device would be through an FPGA, but if your DSP has a McASP peripheral, that could be an option.  You would use the FSx output as the combined RD+CONVST and send SDO A and B into two of the serial input channels.  You could also use two McBSP channels configured in a master/slave relationship.

    The input bandwidth is limited by the RDSon of the sample/hold switch and the sample capacitor.  Unfortunately, I don't have any AC performance numbers beyond the graphs listed in the data sheet.