Summing Two 16-Bit DACs for 24-bit Resolution

Johnw,

Combining two DACs to create a system with greater resolution has been a topic of some interest lately, both from a few of our customers and from our own internal discussions. It's something we've got on the docket to explore and try to build a reference design for, but right now we've got little more than "back of the napkin" sketches and ideas floating around.

The notion of combining two DACs to generate something with higher resolution has been in practice for quite a while in monolithic DAC design. In that context it's commonly referred to as segmentation. Sometimes this is cascading the same DAC architectures on top of one another, like the Kelvin-Varley divider DAC that stacks two string DACs on top of one another, and sometimes it utilizes two different architectures, like an R-2R ladder DAC with both binary weighted legs and thermometer DACs for the MSBs. This idea has been critical in the development of higher and higher resolution resistor based DAC designs.

I'm quite certain that your composite DAC solution would in fact deliver you 24 bits of resolution with any moderate level of design competency. The tricky part would be concerning how accurate that 24 bit composite DAC is, or achieving a composite design that is 24-bit linear. The first DAC in the chain, the "MSB DAC", would set the base line for the linearity of the entire system. Adding the "LSB DAC" to the system will exacerbate things. There's even some chance that the combined system would create a non-monotonic solution. You might be able to combine two 16-bit DACs open loop and maybe achieve 17 or 18 bits of accuracy but I think it would be very challenging to push the boundary up to 24 bits without adding an ADC (something capable of 24 bit accuracy) etc. to "close to loop" and provide feedback. In that case we've basically just got one DAC for course adjustments and another for fine adjustments. By that point, you might have been better off just using the delta-sigma DAC.

The drawback to the delta-sigma device of course is that it's specified for AC performance. It's missing a lot of the specifications that we'd normally provide for the DC performance of a resistor based DAC, so you might have similar problems maintaining linearity with the DAC1282. Being that it doesn't seem to have been characterized, there's not much we can say with certainty.

Concerning audio devices, you'd have to go post on the audio forum to get help on those. I'm not familiar with that portfolio. I do not think you will achieve DC accuracy using the PWM approach. In my opinion, your best bet is either the delta-sigma part or a servo loop on two DACs using the summing stage you proposed. Cascading two DACs (One feeding the next reference) will not have reliable performance since most DACs do not have specified performance with extremely small reference voltages.

I hope this helps. Please keep us in the loop with whichever path you decide to pursue. Should you opt for the composite DAC path I'd be happy to help review the design etc. I'll update this thread if/when we get around to our own composite DAC reference design.

Hello Kevin,

I will post the design here - I have Altium, OrCAD, Eagle, etc... but the design is currently in Altium,  For the time being I  will post a PDF of what we have and take it from there I suppose.

I haven't run anything yet through Spice or other simulator but  I will do that soon (for the filtering).

I will try to have this posted sometime this evening - at least something to start with.

Thanks for your help. 

Regards,
johnw 

Kevin,

Beginnings of a design attached:

0763.dac_example2.PDF

Best Regards,
John W. 

Hi John,

Just an FYI about the DAC1282... Being of the delta-sigma type, it has a lot of high-frequency noise. Please check out this recent forum thread: Output ripple issue DAC1282. The DAC1282 was really only intended to be paired with the ADS1282.

Regards,
Chris

Chris,

So noted.  Thanks for pointing this out.

Maybe TI will design a precision DAC for more GP purposes in the future.

Best Regards,
John W. 

Hello Kevin,

The DAC9881 looks pretty nice - any issues with trying to use that one in this idea?

Regards,
johnw 

Kevin,

Could I run the supply voltage for the DAC9881 at 3.3V?  And the Vref could go to 3.0V and the I/O can be driven at 3.3V?

Thanks,
johnw 

John,

If I were going to try my hand at a composite DAC design I would start with the DAC9881 just so I could start off with the strongest resolution / linearity I could. I think it's a good idea.

Its fine to use the supply voltage / reference combination you have chosen. The only caveat is that some of the performance metrics may deviate from what is shown in the electrical characteristics table since all of that data was collected with a minimum AVDD of 4.75V. If you can provide a 5V supply that'd be preferred.

One of the cooler things about the DAC9881 is that, if there is adequate headroom/footroom between GND/VrefL and VDD/VrefH, the part can achieve true end-point performance from VrefL to VrefH (barring the impact of error specifications, of course).

One more thing - If I were to use DAC9881 I would use the SB grade to make sure I had a true 18-bit part. The S grade device has DNL max specified as 2 LSBs.

Kevin,

OK - thanks for that - and I see from DigiKey the SB grade is roughly 2X the cost - you pay for that!

Regards,
John 

John,

The price breakdown improves for typical production volumes, but yes it is a bit more expensive than the S grade units. If this price difference is a show-stopper we can take this offline and discuss further.

...also, you should be able to request free samples of the device. If you're having issues getting free samples let me know package and quantity and we'll get something to you.

Hello Kevin,

Thanks for the replies - I am discussing with the powers that be now - will let you know.

Regards,
John 

Hello Kevin,

I appears that we have made the decision to go with two 16-bit DACs and play games with the reference voltage input.  I think we can maintain monotonicity that way.

I was even thinking - especially for our application - that we could 'frame' the area that we are homing in on - i.e. - 
the voltage references for both DACs could be dynamically scaled as a 'solution' was converged upon.  This could make things easier - plus would be a guaranteed way to maintain monotonicity within the 'frame' - of course, the solution will have to be within the bounds of the problem being solved.  Maybe a couple of PGA's on the voltage reference in the the loop could do this.  Something to think about I suppose.

Thanks,
johnw

John,

Thanks for sharing the progress.

I'm not sure if you're aware of our TI Precision Designs or not, but we're planning on creating a verified level design on combining two DACs for enhanced resolution this year. As priorities shift it may or may not happen but we'll keep you in the loop as we progress.

Hello Kevin,

OK - I will be looking for it.  Looks like I will go forward with this idea BTW.

Thanks,
johnw