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What can be causing this in the DRDY signal? ADS1298

Other Parts Discussed in Thread: ADS1298

I've been working with the ADS1298 for a couple of weeks but I've recently noted that my DRDY signal isn't doing what it is supposed to. 

It only occurs when I try to get data from the ADS1298 but if I just configure it and keep the START signal high it works just fine. 

I would like to know if someone knows what can be happening. Reset, Start, CS and Clock signals seem to be ok. 

I've attached a picture where you can see that the DRDY (4ms, 250ksps) is ok until I start getting the data. This problem wasn't happening to me before and I can't figure out why is happening now.

Thanks in advance.

  • Based on you picture, DRDY looks to be working properly for all cases.  You might want to review the Continuous Mode section, pg 35, and Data Ready section, pg 32 of the data sheet for more information.

    The DRDY signal is an active low signal.  This means that it is normally high and goes low to indicate that new data is available for readback.  If you do not read the data back, the DRDY signal remains low until right before the next data is ready.  At this time, the DRDY signal must go high and then returns low to indicate the new data is ready.  This is done since most processors connect the DRDY to an interrupt that is triggered on the falling edge of the signal.  This behavior is shown in the Continuous section mentioned above.

    When you read data back, the DRDY signal is cleared on the falling edge of the first SCLK.

    You can confirm this by looking at your picture and note that DRDY transitions from high to low at a fixed rate...this is the data rate of the part.  It just behaves a little different if you do not read the data back.

    If you do not wish this behavior you can either stop conversions with the START pin or issue the STOP command.  Keep in mind that when you restart, there is a delay before data is ready.  You can also look at the Single-Shot mode if the continuous DRDY is not desired.