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autoscan mode

davide bellotti
Intellectual 350 points
Other Parts Discussed in Thread: ADS1258

Hello ,

I have a problem with autoscan mode , I don’t understand  when start the first channel in register mode.

Start when the START command is high  or when send the first the register read command?

The reset , reset all the setting  of the register?

 

If I read the first register 08h all is ok but when I read the entire register  change the input channel  position

Below my code :

Pic 32 mhz  ads 8 mhz spi 500 khz

I have two converters connected  in RC0 and RC7 CS ,now is one in RC7 only

/*programma bus isa

*/

#include <p18f97j60.h>

#include <stdio.h>

#include <stdlib.h>

#include <spi.h>

#include <delays.h>

#include <float.h>

 

void main (void)

{          int dato,rg1,sp,conta;  

char dati[100],val,reg1,cbf[3];

long int pippo;

OpenSPI1(SPI_FOSC_64,MODE_00,SMPMID);

TRISB = 0X00;

ADCON0= 0X00 ;

ADCON1=0x00;

 

TRISC =  0x10;

PORTB = 0;

TRISE = 0XFF;

//dati[0]=  23;

//dati[1] = 10;

//dati[2] = 20;

//dati[3] = 30;

TRISD= 0X00;

conta = 0;

PSPCONbits.PSPMODE = 1;

 

//SSP1STAT = 0b00000000;// Configure register for SPI..(b6=0).

//SSP1CON1 = 0b00100010; // Configure register  for SPI,

// scrittura dei registri del convertitore

PORTCbits.RC7= 0;

WriteSPI1(0b01100000);//comando scrittura registro0

 

Delay10TCYx(5);

WriteSPI1(0b00000000);//config0

 

 

Delay10TCYx(5);

WriteSPI1(0b01100001);//comando scrittura registro1

 

Delay10TCYx(5);

 

WriteSPI1(0b00000000);//config1

 

Delay10TCYx(5);

WriteSPI1(0b01100001);//comando scrittura registro2

 

 

Delay10TCYx(5);

WriteSPI1(0b00000000);//muxsch

 

Delay10TCYx(5);

WriteSPI1(0b01100011);//comando scrittura registro3

 

WriteSPI1(0b00000000);//muxdif

 

 

 

 

Delay10TCYx(5);

WriteSPI1(0b01100100);//comando scrittura registro4

 

 

Delay10TCYx(5);

 

WriteSPI1(0b11111111);//muxsg0

 

 

Delay10TCYx(5);

 

 

WriteSPI1(0b01100101);//comando scrittura registro5

 

 

Delay10TCYx(5);

 

WriteSPI1(0b11111111);//muxsg1

 

 

 

 

 

Delay10TCYx(5);

WriteSPI1(0b01100110);//comando scrittura registro6

 

 

 

Delay10TCYx(5);

 

WriteSPI1(0b00001100);//sysred

 

 

Delay10TCYx(5);

WriteSPI1(0b01100111);//comando scrittura registro7

 

 

 

Delay10TCYx(5);

WriteSPI1(0b11111111);//gpioc

 

 

//WriteSPI1(0b01101000);//comando scrittura registro8

 

Delay10TCYx(5);

//WriteSPI1(0b11001100);//gpiod

 

 

Delay10TCYx(5);

PORTCbits.RC0 = 1;

PORTCbits.RC6 = 1;

PORTCbits.RC2 = 1;

PORTCbits.RC7 = 1;

while (1)

{

reg1 = 0b00110000;

 

conta++;

 

LATD = dati[rg1];

 

switch (conta)

{

case 2 :

 

 

PORTCbits.RC7 = 0;// cs

 

 

 

 

 

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[3] = ReadSPI1();

dati[4] = ReadSPI1();

dati[5] = ReadSPI1();

PORTCbits.RC7= 1;// cs

 

 

case 3 :

PORTCbits.RC7 = 0;// cs

 

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[6] = ReadSPI1();

dati[7] = ReadSPI1();

dati[8] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

case 4 :

PORTCbits.RC7 = 0;// cs

 

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[6] = ReadSPI1();

dati[7] = ReadSPI1();

dati[8] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 5 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[12] = ReadSPI1();

dati[13] = ReadSPI1();

dati[14] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 6 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[15] = ReadSPI1();

dati[16] = ReadSPI1();

dati[17] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 7:

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[18] = ReadSPI1();

dati[19] = ReadSPI1();

dati[20] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 8 :

PORTCbits.RC7 = 0;// cs

 

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[21] = ReadSPI1();

dati[22] = ReadSPI1();

dati[23] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 9 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[24] = ReadSPI1();

dati[25] = ReadSPI1();

dati[26] = ReadSPI1();

 

PORTCbits.RC7 = 1;// cs

 

 

case 10 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[27] = ReadSPI1();

dati[28] = ReadSPI1();

dati[29] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 11:

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[30] = ReadSPI1();

dati[31] = ReadSPI1();

dati[32] = ReadSPI1();

 

PORTCbits.RC7 = 1;// cs

 

 

case 12:

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[33] = ReadSPI1();

dati[34] = ReadSPI1();

dati[35] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 13:

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[36] = ReadSPI1();

dati[37] = ReadSPI1();

dati[38] = ReadSPI1();

 

PORTCbits.RC7 = 1;// cs

 

case 14 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[39] = ReadSPI1();

dati[40] = ReadSPI1();

dati[41] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

 

case 15 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[42] = ReadSPI1();

dati[43] = ReadSPI1();

dati[44] = ReadSPI1();

PORTCbits.RC0 = 1;// cs

 

 

case 16 :

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[45] = ReadSPI1();

dati[46] = ReadSPI1();

dati[47] = ReadSPI1();

PORTCbits.RC7 = 1;// cs

 

 

case 17:

PORTCbits.RC7 = 0;// cs

 

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[48] = ReadSPI1();

dati[49] = ReadSPI1();

dati[50] = ReadSPI1();

 

PORTCbits.RC7 = 1;// cs

 

 

case 18:

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[51] = ReadSPI1();

dati[52] = ReadSPI1();

dati[53] = ReadSPI1();

 

PORTCbits.RC7 = 1;// cs

 

case 19:

PORTCbits.RC7 = 0;// cs

WriteSPI1(0b00110000);

dati[2] = ReadSPI1();

dati[54] = ReadSPI1();

dati[55] = ReadSPI1();

dati[56] = ReadSPI1();

 

PORTCbits.RC7= 1;// cs

 

 

 

 

 

case 20:

 

PORTCbits.RC6 = 0;

 

Delay10TCYx(1);

PORTCbits.RC6 = 1;

PORTCbits.RC7 = 1;

conta = 1;

 

 

 

}

 

 

 

 

 

 

 

 

 

 

PORTB = SSP1STAT;

 

if (PORTEbits.RE3 = 1)

{

if (PSPCONbits.IBF = 1)

{

dato =PORTD ;

PIR1bits.PSPIF = 0;

}

}

 

 

 

 

if (PORTEbits.RE4 = 1)

{

if (PSPCONbits.IBF = 1)

{

rg1 =PORTD;

PIR1bits.PSPIF = 0;

}

}

 

if (PSPCONbits.IBOV = 1)

{

PSPCONbits.IBOV = 0;

}

}         

}                     

Regards

Bellotti Davide .

  • 0
    TI__Guru* 97595 points

    Davide,

    What part is this for? It will help us make sure the right person can answer this question.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Intellectual 350 points

    Sorry , i'm using a ads1258 ad converter .

    regards.

  • 0 in reply to davide bellotti
    TI__Mastermind 43915 points

    David,

    When you run the ADS1258 in autoscan mode you will be notified that new data is ready once DRDY assets low. It is recommended to monitor DRDY to synchronize the read operation to avoid data corruption. Once you are notified by DRDY, send the Channel Data read command and the next 3 bytes will correspond to the contents of your data register.

    The START pin is used as a start conversion input. In auto scan mode, when START is held high, the converter is converting. The DRDY signal is used to tell you when new data is ready.

    Pulsing the START pin is used in pulse converting, when you just want to convert one channel at a time. I do not think this is what you want to do.

    I have some additional notes about the timing in your setup. See below:

    From my understanding, you are running the device with a 8MHz master clock and a 500 kHz SCLK. The ADS1258 is a single A to D converter with a built in mux to change from channel to channel. There is only one data register in the device. As a conversion will complete, DRDY goes low and the result of the conversion is placed in the data register. If you're monitoring DRDY, then you clock the data out before the next conversion is complete. The Channel Data (register format) read requires 40 SCLK cycles. 40 SCLK cycles is enough time for the status byte/read command and 3 data bytes to be output.

    At full speed with a 16 MHz clock, the new conversion data comes every 1/125k (at 125 kSPS)= 8us. Therefore, you will be able to have a minimum SCLK period of 8us/40 = 200ns, which is a clock rate of 5MHz.

    In your set up, you have a fclk of 8MHz or a max conversion time of 1/62.5k (at 62.5kSPS) = 16 us. You will need to have a minimum SCLK period of 16us/40 = 400ns, which is a clock rate of 2.5MHz. Speed up your SCLK and you will able to read out the data in time.

    Regards,

    Tony Calabria

  • 0 in reply to Tony Calabria
    Intellectual 350 points

    thank Tony for your fast reply ,tomorrow  I wil test this configuration .

    if I understand :

    1  the reset is not used for the read sequence

    2 i send new read commad after the DRDY  low

    3  SCLK minimum 2.5 Mhz.

     

    Regards ,

    Bellotti Davide

  • 0 in reply to Tony Calabria
    Intellectual 350 points

    tony thank for your reply,

    the device now work wery good , in free scan no start no ready only with reading the register using the byte with the register first 4 bits .

    thank for your reply the converter work very goog .

    we want to change the pic with a stellaris  in the next project

  • 0 in reply to davide bellotti
    Intellectual 350 points

    The datasheet is not clean because when you use the converter in free scan mode and want to read only the value is not necessary read and use the start and dataready ,read the first register pointer 4 bits and load the values .

    .I’m using this way and work very good . Of course if you want read

     the value in a specified position in  real time  start and dataready are necessary.

    250 microvolts is now the stability  but I  want increase this precision  with algorithm in the microcontroller .If You have a suggestion please let me know your idea.

    Bellotti Davide