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ADC12D1800 Calibration Values

Other Parts Discussed in Thread: ADC12D1800

I'm using the ADC12D1800 in non-DES Mode with a sampling rate of 1740MHz.
After a calibration I see high spurs at FS/2 and FS/4.
The magnitude of the spurs changes from calibration to calibration.
The result values of an adc self-calibration can be read out at Addr 0x05 (Calibration Values) - described on page 70 in the datasheet and the calibration values can also be written with this register but I can't find an description of these values.
The reason why I want to get an description of the values is that I am trying to change the offset and gain values of
the two interleaved adc cores and make the calibration by myself.

Thanks,
Peter

  • Hello Peter,

    There have been similar requests in the past:

    http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/291370/1017786.aspx#1017786

    Unfortunately the short answer is that we cannot share this information.

    The frequency spectrum will change from calibration to calibration because of the folding and interpolating architecture. DC offsets, timing, and gain mismatch between the ADC cores will result in the FS/2 and FS/4 spurs (Refer to www.ti.com/litv/pdf/slaa617 for more information). Similarly, a small change in the transfer curve can result in a very different response with non-linear harmonic amplitude variation particularly with smaller input amplitudes. Add in part to part variation, input amplitude, frequency, and device temperature (which changes over time as the device heats up) and it will be very difficult to predict which setting will yield the best response for every device.

    The primary benefit of using the calibration read/write feature is to maximize repeatability of Full Scale Range and input termination impedance for test and measurement applications. Previous calibration values can be stored and re-loaded when the converter is operating under the same conditions. If needed the calibration can then be run without re-calibrating the input termination resistance, helping to maintain FSR while optimizing other ADC parameters.

    Hope this helps!