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ADS7263 - CONVST signal

Kawai
Guru 19785 points
Other Parts Discussed in Thread: ADS7263, TMS320C28346

Hi Team,

Our customer is considering to use ADS7263 with TMS320C28346.

TMS320 seems to be able to control the CONVST rising edge syncronized to CLOCK rising edge.

As there is an limitation for the rising timing, is it impossible to use with the above devices ?

If you could help us, could you please send me an email ?
I appreciate if you could let us discuss offline.

Thanks in advance.

Best Regards,
Kawai

  • 0
    TI__Guru**** 181351 points

    Hi Kawai,

    Unlike the RD input on the ADS7263, the CONVST input does not need a clock edge to be recognized.  The sample and hold switch opens with the application of the CONVST, going from sample to hold mode, regardless of the SCLK input.  The actual start of conversion timing however, is dependent on the SCLK input.  In order to achieve the maximum throughput, the CONVST input would be applied high on the falling SCLK edge so that the next rising SCLK edge started the conversion process.  If your CONVST is synchronous with the rising SCLK, it will be the next rising SCLK edge that starts the conversion process.  I'll send you an e-mail explaining it a bit further...