Hello
I would like know how to decreas DC offset in ouput of DAC34SH84.
As The below is Block-Diagram with frequency plane, The output of DAC34SH34 has RF signal(Desired signal + DC Offset(Undesired Signal).
I checked the ouput data of FPGA through Capture with FFT, it does not have DC-Offset. Therefore, I reconized that the source of DC-Offset comes from DAC34SH384.
Please let me know how to remove the DC-Offset.
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FPGA(Base Band: -25MHz-60Khz)--> DAC34SH84(IF: 3* Fs/8 = 552.96MHz, Fs=1474.56MHz)--> IQ Modulator(Loca:2042.1MHz) -->RF ouput : 2570MHz(Desired signal) + 2595.06MHz(DC Offset).
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Thanks and Best Regards

