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SPI communication problem when multiple AFE4490 on the same SPI bus

Mairo Leier
Prodigy 150 points
Other Parts Discussed in Thread: AFE4490, AFE4400

I have two AFE4490 devices on one SPI bus but with different STE pins. If I have one AFE connected I can read correct values from AFE registers. After connecting both AFEs on the bus I enable DIGOUT_TRISTATE mode on both AFEs. When I try to read from register I will disable TRISTATE on that AFE and get the correct value, then enable TRISTATE again. If I repeat the same procedure on the second time I will get only zeros.

I have no external pullups or pulldown resistors and no other SPI devices connected to that bus.
 Also connected logic analyzer to the SPI bus to doublecheck but no idea what is causing that.

Is there any errata sheet for AFE4490?

I am out of ideas, please help!

  • 0
    Expert 2110 points

    Use oscilloscope instead of logical analyzer to see if there is true 0 or 1.

    Add pullup or pulldown on MOSI when both AFE have DIGOUT_TRISTATE enable to see if this signal is really high impedance.

    Do you read 0xFFFF with pullup?

    Write and read differents  registers on both AFE.

  • 0 in reply to MichRFT
    TI__Intellectual 1910 points

    Hi Mairo,

    I just set this up in my lab and can read and write to both AFE's no problem. Are you still having this issue? Have you tried Mich's suggestions above?

    Regards,
    Gui

  • 0 in reply to Guilherme Borba
    Prodigy 150 points

    Hi, Thanks for the reply!

    Fortunately that was my mistake. There was my own function that by mistake changed chip select pin from output to input. This now solved but I have more serious problem about sampling rate when two AFEs are connected. I have spent over two full days with my colleague to sort out what is causing that problem...

    By default, with sampling rate of 500Hz, time between each ADC_READY interrupt is 2ms = 500Hz.  I checked that with logic analzer and confirmed.

    If I enable TRISTATE then sampling rate increases automatically to around 4.5ms. I have disabled all of my other code but the time stays around that 4.4...4.6ms.

    What I have tried:

    - two AFEs connected and TRISTATE enabled -time between ADC_READY interrupt ca 4.5ms

    - One AFE connected and TRISTATE enabled -time between ADC_READY interrupt ca 4.5ms

    - One AFE connected and TRISTATE disabled -time between ADC_READY interrupt  2ms

    - If I don't sent the device start ADC reading command and my while loop runs without any interrupts without doing practically anything whole cycle lasts ca 15us. That helps to eliminate possible lack of resources caused by other processes.

    - doublecheck ADC_READY pin directly from AF - interrupt time matches exactly with the interrupt in software

    - Next step I am planning: increase sampling frequency from 500 to 1000 and test all above and see will the TRISTATE interrupt decrease twice or is it a kind of constant value

    - Second step I am planning: all timings have been confirmed from AFE1. I will try the same with AFE2 module to exclude the possibility of faulty AFE1 module.

    - Question: what exactly AFE is doing when SPI chip select is deselected? This AFE4490 manual is lacking of information about that.

  • 0 in reply to Mairo Leier
    Expert 2110 points

    I do not know about AFE4490 but for AFE4400 when TRISTATE, ADC_READY pin is tri-stated too, so no interruption possible ...

  • 0 in reply to MichRFT
    Prodigy 150 points

    This is not good news...significant drawback for me. What is the purpose of using more than one AFE on the same SPI bus then?

    Does this mean that I have to set up my own counter inside uC that asks in every 2ms new readings? How do I know that there are new readings ready to read out and not being overwritten?

  • 0 in reply to Mairo Leier
    Expert 2110 points

    I use only 1 AFE4400 + 1 accelerometer on the same SPI, different CS. I added a 74AHC1G125 at the AFE4400 SOMI output (OE linked to the AFE4400 CS). ADC_RDY linked to an MSP interrupt.

  • 0 in reply to MichRFT
    Prodigy 150 points

    Thanks for the good hint!

    Basically if I add one bus buffer to each AFE4490 MISO line then I could forget all this tristate stuff. I have separate CS pins as well so it should work.