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DDC112 DValid Issue

Other Parts Discussed in Thread: DDC112

Hello,

I am using the DDC112 in a photoelectric measurement circuit but am experiencing an issue with what appears to be the DValid line.  Every now and again (say 1-30) system power ups, the DValid line never appears to trigger.  Looking at all of the lines on a scope (Dvalid, Dout, Dxmit, DCLk, CONV) they all seem to meet every requirement when they work (the other 29-30 times), but when it doesn't come up correctly I only see the CONV signal cycling with all of the other lines silent.  

I have attached two screenshots depicting the waveforms seen when the chip is working as expected.

  • Tim,

    At powerup, are you giving the DDC a short amount of time to initialize before starting your CONV, CLK, and other digital/analog input signals? This time should be in the microseconds range but if you have the digital and analog input signals (not power) to the chip before it is fully powered, you may be putting it in a weird state on those rare occasions. Check your power sequencing to make sure you're not trying to use the part before it is ready. As far as we know there aren't power sequencing between analog and digital supplies, only that both are necessary and should be powered closely in time.

    Regards,

    -Adam

  • This could possibly be the issue I suppose.  I don't believe in the code there is a clear cut "WAIT" type state so I would assume that its just the time taken to initialize the FPGA that's controlling the DDC "startup" time.  I do know that the analog and digital supplies startup at the same time, so that is probably not it; more likely the input signals.  Also, as we only use one of the two inputs, we ground out one of the input channels.  Along with this, the board designer did not implement external caps nor set the internal caps to anything.  Should we setup that other channel further even though we will never use it (don't think that would cause the problem, but for any other issues in the future).

    I will troubleshoot this and report back.  If anything else is thought of, I'd be more than happy to troubleshoot further.

    Best Regards,

    Tim

  • Tim,

    Grounding the unused input is fine. Are you using external integration caps or internal caps on the used channel? If you're using internal then both channels will be set to the same internal cap and you should be fine there. If you are using external caps, make sure that you follow the Integration Capacitors section (pg11) in the datasheet. Basically you want the caps to be very similar on all 4 pairs of external cap connections. Let me know what you find and we can discuss further.

    Regards,

    -Adam