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Waveform DAC3484 with TSW1400

Jin Kyung Han
Expert 1520 points

Hello

I would like to know operating DAC3484, the I/Q ouput of DAC3484 is a like imbalance.

I tested this through that TSW1400 pattern generator linked to the DAC3484EVM. I atatched file it has test

procedure and configuration in terms of H/W and S/W

.1537.TSW1400 - DAC3483 EVB_WTK.ppt

Please give me solution which point wrong I did.

Thanks and Best Regards

  • 0
    TI__Guru* 83745 points

    Hello,

    One issue that I see is that the PFD frequency of the PLL is at 61.44MHz. You will need to set this to lower (i.e. Fdac/4/8 = 30.72MHz) if OSTR is used for FIFO sync. 

    To troubleshoot, simply set FIFO output sync to FRAME and recheck the waveform. 

    I would also start out testing the DAC without the on-chip PLL enabled and double check the performance. This is to minimize variables.

    You may also want to take advantage of the output muxing (found in the output tab) to switch the digital signals of A and C path to output B and D. If the output on B and D are still abnormal, then the physical output channels may have some issue.

    -Kang

  • 0 in reply to Kang Hsia
    Expert 1520 points

    Dear Kang

    Thank you for supporting.

    -Jin