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ADS1274 maximum differential input

Isaac Abbott
Intellectual 805 points

Other Parts Discussed in Thread: ADS1274, THS4521, ADS1278

E2E,

We have been using the ADS1274 quite happily for some time now, but discovered a potential issue recently.

Our circuit is very similar to Figure 88 in the datasheet (sbas367F, revised Feb. 2011).

AVDD = 5V, DVDD = 1.8V, IOVDD = 3.3V, VREF = 2.5V, VCOM=2.5V

We are using the THS4521 to drive the analog inputs.

Normally our analog differential inputs range from approx. -2.5V to +2.5V, and we get stable ADC counts readings from 0 – 2^24, as expected.  However, at times the output of the THS4521 could continue to rise up to its rail (nearly 5V). When the differential input to the ADC goes above +2.5V, to ADC count pegs to 0xFFFFFFF as expected, until the differential input reaches approximately +4.85V, at which time the ADC count values go berserk – seemingly random values from 0 – 0xFFFFFFFF.

From the spec, we understood that our differential input was allowed to go as high as AVDD + 0.1V (so 5.1V). Are we understanding this spec correctly? Or are we doing something that this part is not designed to handle?

Thanks for your help

  • 0
    TI__Mastermind 23235 points

    A couple questions:

    1. Are the AGND and DGND tied together near the chip?  Is there a voltage differential between them?

    2.  What is the actual voltage at each of the pins during the max case? ie What is AINP and AINN, not differentially?

    3.  Are you using the VCOM pin of the ADS1278, buffering it and then using it to drive the THS4521?

  • 0 in reply to Greg Hupp
    Intellectual 805 points

    Hi Greg,

    Answers to above questions:

    1. Yes, AGND and DGND are tied together somewhat near the chip. I measure 1.5 mV between them at the ADC.

    2. During the max case AINP = 4.935V, AINN = 0.055V, AVCC = 4.999V (with respect to AGND).

        The transition to unstable ADC count readings: AINP=4.888, AINN=0.053.

    3. Yes, we are using the VCOM pin of ADS1274, buffering it and then using it to drive the THS4521 

  • 0 in reply to Isaac Abbott
    TI__Mastermind 23235 points

    Isaac -

    Yes, the input can go to the limits in the datasheet without damage to the device.

    However, the issue becomes that you are saturating the modulator of the ADC, hence the instability.  Normally, system are designed such that the inputs do not exceed +/- Vref, since it doesn't change the output code.  Whether this is done by implementing input protection designed to clamp the inputs or some kind of gain adjust for larger signals is usually a choice that must be made for your design.  Additionally, running signals near the supply rails of most parts will begin to introduce noise, distortion, or non-linearities that all degrade performance.

  • 0 in reply to Greg Hupp
    Intellectual 805 points

    Thank you for the clarification, Greg, we will make changes to our circuit to provide analog input protection.

    We assumed from pg. 24 of the datasheet that inputs up to AVDD would be okay:

    "A positive full-scale input produces an ideal output code of 7FFFFFh, and the negative full-scale input produces an ideal output code of 800000h. The output clips at these codes for signals exceeding full-scale."

    "While the ADS1274/78 measures the differential input signal, the absolute input voltage is also important. This value is the voltage on either input (AINP or AINN) with respect to AGND. The range for this voltage is:

    –0.1V < (AINN or AINP) < AVDD + 0.1V

    If either input is taken below –0.4V or above (AVDD + 0.4V), ESD protection diodes on the inputs may turn on. If these conditions are possible, external Schottky clamp diodes or series resistors may be required to limit the input current to safe values (see the Absolute Maximum Ratings table)."