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ADS412x/4x Offset Correction wrap-around problem

Simon Goyette
Prodigy 85 points

Other Parts Discussed in Thread: ADS4129

Hello,

I'm using the ADS4129 since a while and recently look to use the internal offset correction algorithm. It seems that when the signal is out-of-range positive with offset correction enabled sample value overflowed if the actual offset correction to apply is positive.

Ex.: In the case of a 2's complement 12bits sample at 2047LSB with a known offset of -5LSB without offset correction enabled. At this point if we enable offset correction this same sample becomes -2044LSB.

Anyone else is aware of that issue ?

  • 0
    TI__Genius 17470 points

    Hi Simon,

    There is an error in the implementation in that it does not detect/prevent overflow errors in the offset summation block. Your options are to try to "catch" this error in your FPGA or to implement a similar offset correction algorithm within your FPGA that tolerates overflow. A simple digital low pass filter with long time constant can be used to measure the offset error.

    Regards,
    Matt Guibord