When enable the OFFSET Correction of ADS62P49 the input data appear burr

Hi Xiang,

Have you verified that the chip is setup for either 2's complement or offset binary encoding? It looks like you're expecting 2's compliment, so verify the ADC is setup the same.

Can you try running a sinewave into the ADC to verify proper ADC operation?

Regards,
Matt Guibord

Hi Matt,

Yes, the ADC is 2's complement.

I set the Register 0x50 with 0x04.

Regards,

xiang Song

Hi Matt,

Also, I have set the Register 0x62 to 0x04.

"In ADS62P49/48, output data increments by one LSB(14-bit) every clock cycle from code 0 to code 16383"

And the input data is OK, so I think the interface between FPGA and ADC is OK.

Regards,

xiang song

Hi Matt,

The frequency of ADS62P49 is 122.88MHz, Now I input a 12.288MHz @ -10dBm signal to Port A of ADS62P49, The burr does not appear.

The Port A of ADS62P49 when OFFSET CORRECT open

The Port B of ADS62P49 without signal input

      From the Scope, we can see the OFFSET CORRECT work well.

    But, if I disconnect the signal from port A, the burr will appear again, why?

Regards,

xiang song.

Can you give me some advise?

Thanks.

Hi Xiang Song,

Can you try putting a 50Ω termination on the analog input and see if the error is still there?

After you enable offset correction, do you constantly see the error or does it only happen once after enabling offset correction?

Regards,
Matt Guibord

1. I will try putting a 50Ohm termination on the analog input.

The input circuit of ADS62P49 is as follow:

2. After enable offset correction, the error constantly happen.

I add a 50ohm termination on the analog input, the error is still there.