DAC8568 DAC Output Drops out despite Valid SPI Input

Darnell,

The oscilloscope plots look correct at first glance, but I do have a few questions.

• Is /LDAC tied low or high?
• The DAC_SYNC_ISO, seems to be the same for both the DAC8563 /SYNC and DAC8568 /SYNC.
  • The serial words are different for each device. How are you managing this?
• What is the voltage level of the digital signals? What is the time scale?

Darnell,

Any updates?

Hi Eugenio, I'm the FW engineer; I'll answer for Darnell.

LDAC is tied 0 in FW at the very beginning, and then never changed again.

Great call on the DAC_SYNC_ISO.  I don't know where Darnell got the original picture, but this is the schematic I have (which is also from Darnell).  I believe  this is what we are running right now, so this should not be a problem.

The voltage level is 3.3 V, and I set UCA3BR = 2, with SMCLK running at 3 MHz.

Does this answer your question Eugenio?

Hi Henry,

Darnell Kemp said:

The only way we have found to restore the output of the DAC8568 is to reinitialize the DAC configuration settings over the SPI.

If this is the case, then its possible that either the reference is powering down, or the channels are powering down.

After a dropout, you can try to send an SPI command to power-on the reference. Take a look at Table 11 in the DAC8568 datasheet. I believe the code to power-on the reference should be 0x090A0000.

If this doesn't work, you can also try to power-on the channels.

I suspect that if you can restore the functionality by a software reset, then somehow the either internal reference or the channels may be powering-off.

Hi Eugenio,

Yes, we can get the functionality back by reinitializing the DAC.  Since I do both the reference and channel configurations in the same function, I don't know which one does the trick right now.  I agree with your hypothesis, but then what is the next step?

Maybe on a tangent, but what I thought would be nice is for the DAC to REMEMBER the config parameters in the flash, so that even if something happens and the chip resets, it will quickly go back to what it was doing before.  I know that this chip doesn't have that feature...

Hi Henry,

Henry Choi said:

Maybe on a tangent, but what I thought would be nice is for the DAC to REMEMBER the config parameters in the flash, so that even if something happens and the chip resets, it will quickly go back to what it was doing before.  I know that this chip doesn't have that feature...

Currently none of the DACs in our portfolio have this feature. I will pass this request onto our Parts Definer. We are always interested in knowing what features our customer are interested in. Thank you very much for your feedback.

Henry Choi said:

I agree with your hypothesis, but then what is the next step?

I know its a stretch, but if this is the case, then I would suspect that the culprit may be another function call to a different DAC that is pulling HTR_DAC_SYNC_ISO low momentarily and writing a value to the DAC8568.

Do you know if the DAC drops to Zero while other DACs are being addressed? Or does it happen while the system has been static for a while?

Darnell mentioned that the dropout is intermittent, but could you give me an idea of how often does this happens?

We have never had this issue reported before and it sounds quite tricky to debug. If this doesn't work I will setup a meeting with a few other people from my team to get some other ideas as to how to debug this issue.

Thank you Eugenio, I understand you are asking whether I mistakenly pull down the HTR_DAC_SYNC_ISO when I write to the TEC_DAC.  Along the same line, you could perhaps be wondering if I have multiple threads writing to the 2 DACs.

The DAC writing happens only in 1 thread, and so far, only in 1 function.  I'll check if the DAC output ever drops to 0, but honestly, this is going to be very hard to catch, because the problem only happens in 2 situations:

1. Right away, upon startup (when I would be commanding 0 to the DAC).
2. After I pull a lot of current on the TEC (driven by the TEC DAC) momentarily, while in closed loop control--during which time it is COMMON to command the HTR_DAC to 0.

This problem was hard to reproduce from the beginning, and has been disappearing gradually as we have reworked and spun new boards (which did NOT touch the heater or the TEC DACs).  Now, with the latest production boards, we may never see this problem again, though it could change quickly again...

Henry Choi said:

• Right away, upon startup (when I would be commanding 0 to the DAC).
• After I pull a lot of current on the TEC (driven by the TEC DAC) momentarily, while in closed loop control--during which time it is COMMON to command the HTR_DAC to 0.

It would be great if you could monitor the digital lines during these two events.

How much current are you pulling?

It may be useful to review the layout that is being used. We can move this to an email thread if you would like to keep this private. If you are interested in this, can I email you at your registered E2E forum email?

Hi Eugenio, like I said, this problem is getting rarer and rarer.  BUT, let me understand what you mean by "monitor the digital lines": do you mean I monitor the SPI communication in logic analyzer, or do you mean I monitor the SYNC line?

I used to pull up to 10 A, although I scaled down to 6~7 A these days.  The circuit is supposed to be rated up to 10 A...

Hi Henry,

Henry Choi said:

let me understand what you mean by "monitor the digital lines": do you mean I monitor the SPI communication in logic analyzer, or do you mean I monitor the SYNC line?

I mean monitoring the voltage level on SYNC line. My hypothesis is that the large current draw can be causing the power supplies to droop.

Can you try drawing 10A again? Maybe this makes the issue more apparent.

Hi Henry,

Do you have any new developments?

Were you able to monitor the SPI lines while drawing 10A?