ADC12J400 Question

Jillian Walsh

I was wondering if it would be possible to get the HLD code for this ADC. Also is possible to set up and automated run on this ADC (for example using a python code to test different input frequencies)

Thanks

Jill

over 11 years ago

0 jim s over 11 years ago

TI__Guru* 91947 points

Jill,

Are you looking for the VHDL code used by our capture card? If so, what mode are you using for the ADC? What FPGA are you planning on using?

Regards,

Jim

0 Jillian Walsh over 11 years ago in reply to jim s

Prodigy 90 points

Hi Jim,

Yes I am looking for the VHDL code used by your capture card. The mode I'm using is the bypassing mode. And the FPGA was just planning on using the one that on the data capture board (ArriaV 5AGME1EH29).

Thanks,

Jill

0 jim s over 11 years ago in reply to Jillian Walsh

TI__Guru* 91947 points

Jill,

The link below will provide the firmware that was generated with the MTI JESD IP core. We are currently working on a new build that will use the Altera Mega-core JESD IP. This shoud be available in about 1 month.

Regards,

Jim

https://txn.box.com/s/xf8ekhsu98alyzxdirwe

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ADC12J400 Question