ADS1248 Accuracy vs. Sample Rate

Hi Kevin,

It is difficult to say why the resistance is trending down.  For certain the noise will increase with the increase of data rate.  The peak to peak noise can increase 2 to 3 times more from 5sps to 20sps.  You may see an improvement if you use the PGA at higher gains.  I normally look at the change in codes instead of the change in resistance to get a better idea of what is happening.  This removes any calculation error.  Also, you should be using the external reference created by the bias resistor.  As I don't know your register settings, I can't tell if you are using the external reference.

Also, it is always a good idea to run the SELFOCAL command after power up and after a change in PGA setting.

The stability of the Rbias resistor is also important.  If this value changes from self-heating, then the results will also change.  Do you have a capacitor on the VREFOUT/VREFCOM pins?  This is important as the internal reference will be unstable without it.  The internal reference is used to establish the IDAC sources.

Not knowing your exact test conditions and setup, you may have some problem due to analog settling.

Best regards,

Bob B

Hi Bob,

Thanks for the reply.  Let me further explain my setup.

Register settings are all default except those listed below.

RTD1:

MUX0 = 0x01     //to select A0(+),A1(-) as inputs

IDAC1 = 0x23    //to select A2,A3 as IDACs

MUX1 = 0xA0    //turn on internal ref, Select REF0 external pair (1.65k Rbias)

SYS0 = 0x02    //PGA = 1, 20SPS

IDAC0 = 0x04  //500uA

The second RTD has identical settings except with MUX0 = 0x25 and IDAC1 = 0x67.

The output codes (as opposed to resistance are):

5SPS = 0x043C42

10SPS = 0x0437D8

20SPS = 0x042F0A

I understand noise increases with higher sampling rate, however I would not expect it to have such a drastic effect.  Perhaps I am wrong.

Rbias as well as all filter resistances are .01% tolerance.  Filter capacitor tolerance is 5%.  There is a 10% X7R 10uF ceramic capacitor across VREFOUT/VREFCOM, with VREFCOM grounded.

I have two scenarios to test:

1) Remove ferrite bead between DVDD and AVDD, both are 3.3V.  I recently read this is not recommended.  Do you think this could be a cause of this issue?

2) Try the SELFOCAL command.  Does this need to be done with the RTDs attached?  Any other calibration commands that should be done?

-Kevin

Hi Kevin,

If you want some isolation between the AVDD and DVDD supplies it is better to use a 10 ohm resistor. This adds a little filtering and allows for the sharp current demands when the ADS1248 is starting up.  I doubt that this is the cause to what you are seeing, but can be problematic to use any form of inductance on the supplies.

The SELFOCAL command disconnects the inputs from the ADC and applies an internal short.  The result adjusts the OFC register for a zero reading.  So with this command it does not matter if you have anything connected to the input.  Any further calibration should be done based on known values to establish a two point calibration (or more points if desired).  This allows you to find the true gain slope and can be used as a correction factor to remove gain error.

Otherwise it appears you are doing things correctly.  It would be interesting to see a series of succesive readings at each data rate.  A single point does not give us much to go on.  From 5sps to 20sps there is about 11.7 bits spread, so not all of this is noise.  I'm not sure what can be different.  The modulator rate (true sample rate) is the same at 32kHz for 5, 10, and 20sps.  The digital filter response changes between each data rate, but that would not seem likely to account for a lower voltage measurement.

Just as I was about to send this response I saw that you sent your schematic.  You may have some leakage paths relative to the current.  I would remove C5 through C10.  Also, I'm not sure how you are physically attaching the RTDs.  You need to make sure that they are attached correctly.  You must make sure that the current flows through the leads.  For example, the net names do not necessarily reflect the correct connection.  The true wiring connections must be exactly as shown in Figure 10 of the referenced application note.  The connections should look like below with current following the arrows and connection points.

Best regards,

Bob B

Bob,

I do not have 10 Ohm resistors on hand at the moment, so for the time being I have inserted 0 Ohm jumpers to replace the ferrite bead.  This seemed to have no effect on the issue.

I applied the SELFOCAL command, this did not seem to fix the issue either.

The RTDs are wired as you show with the black lines, the schematic I drew up quick was pretty crude and the net names did not give an accurate description of the actual wiring.  It is exactly as you have drawn.

I have removed the capacitors C5 - C10, this did not fix the issue either.

You requested a sequence of output codes:

5SPS: 0x043A58    0x043A50    0x043A4D    0x043A4F    0x043A56

10SPS: 0x0435BC    0x0435C5    0x0435C1    0x0435B5    0x0435C0

20SPS: 0x042CE6    0x042CEC    0x042CEA    0x042CD5    0x042CE4

I let it report values for a few minutes and they never wavered far from this snapshot of codes.

I am at a loss to explain this behavior.  It does seem like there might be some sort of analog settling issue as the values are close to correct but perhaps not reaching steady state, what are your thoughts on this?  Not sure how to evaluate this.

To simplify this issue I have shown a single ADS1248 on the schematic.  In reality, I have a chain of 4 ADS1248 converters operating off an external 4.096MHz oscillator.  So some parts of the schematic are different (the CLK pin is not tied to ground, for instance). I am only using 2 of the 4 at the moment.  Not sure if this helps shed light on the problem, but perhaps it is related?

Feel free to email me as well.

-Kevin

Bob,

It certainly appears like a settling issue.  Before, I was cycling between the two RTDs on the single ADS1248.  IF I only read a single RTD, I do not get decreasing voltage values with an increase in sampling rate.

So, if there a necessary timing step that I am missing when cycling between channels of the same ADS1248?  All I am doing is changing MUX0 and IDAC1 registers, with no PGA or Sampling rate changes.

-Kevin

Hi Kevin,

This makes more sense.  At 5sps, there are more points in the result.  At 20sps there are fewer.  The current when switching the IDACs will affect the reference and the inputs.  There is a small bias current that must charge the input caps before the input is stable.  At 24-bit, the number of time constants is around 17 if my memory serves me correctly to get to 1/2 LSB stable.  Remember that both the analog inputs and the reference must be fully settled to get an accurate measurement.

I would suggest you ping pong between devices so as not to create large delay times in the reading.  You can setup one device and let it settle while reading from the other device.  Change the IDAC/MUX on the device just read and go back to the first device, and so on.

Best regards,

Bob B

Bob,

The problem is exclusively with the settling time of the IDACs, when switching them among the ADS1248 inputs.  

Right now my system 'ping-pongs' between devices to allow time for the IDACs to settle, but this loop is complete much faster than the required settling time.  At 5SPS, it takes about a 200ms delay between IDAC1 re-assignments before the inputs have settled.  At 20SPS, I can get away with about 100ms of delay but the result is noisier (as expected).

What determines the IDAC settling time?  I do not see a specification for this in the datasheet nor any examples of switching IDACs between channels.  Any hardware changes I can do, perhaps reduce the capacitance at VREFOUT?

I cannot think of any other arrangement of 2x 3-wire RTDs on a single ADS1248 that does not require switching of the IDAC sources (assuming both sources are used per RTD to cancel the effects of wiring).

Kevin