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Design with ADS 8342

Other Parts Discussed in Thread: TINA-TI, ADS8342, OPA725, ADS8556

Hi,

Could anyone advise me where to get the simulation model for the ADS 8342 chip or similar bipolar ADC.

I used TINA-TI but can't find any ADC simulation there, my goal is to simulate the ADC with several opamps coupled to it.

-Akerb

  • Hi Akerb,

    Unfortunately, we don't have a SPICE type model for the ADS8342 that could be used in TINA.  Best we might be able to come up with at the moment is an IBIS model to simulate the DIO.  I see you found the post regarding 'Spice (or other) models for data converters' here in the forum, so you know this is something we are looking into.

  • Hi Tom,

    So you mean there is no way to try if opamp front-end will be accepted by the ADS 8342? 

    Can you at least help me out, i'm trying to see what opamp design will fit for the ADS8342, with the ac signal source of +/-1V? 

    BTW, where can I get the IBIS model? 

    -Akerb

  • Hi Akerb,

    regarding your op amp question:

    Per the supply configuration of the ADS8342, I assume the op amp you use will have a V+=5V and V-=-5V.  Similar to the schematic in the ADS datasheet an op amp such as the OPA725 would work.

    thanks!

    carissa

  • Carissa,

    Basically, the signal to be converted is a +/-1V signal, I think I don't need an opamp, I'll just set the ADS8342 VREF to +1V and -VREF to -1V, right?

    -akerb

  • Hi again Akerb,

    The input range to the ADS8342 is +/-Vref about GND, with Vref being +2.5V (typical).  The minimum reference voltage is specified to be +2.0V and there is no option for a -Vref input on this part.  If you were to take your +/-1V input signal with a gain of 2 or 2.5 and use a 2V or 2.5V reference, you would meet the full dynamic input range of the device.  The input to the ADS8342 is basically an analog switch with a sample and hold capacitor, you can look at this like an R/C where R is the RDSon of the switch and C is the sample and hold capacitor.  This is shown on page 3 of the ADS8342 data sheet - RDSon is about 500 ohms and the capacitor is 20pF.

    More often than not, applications using SAR (successive approximation register) converters need to employ an amplifier with sufficient bandwidth to fully settle the analog input to within 1/2 LSB during its acquisition phase.   When running the ADS8342 at full speed, the acquisition time is 600ns.  We need about 11.8 time constants to settle to 1/2 LSB at 16-bits, which means you are looking at an amplifier with a unity gain bandwidth of about 12.5MHz.  The OPA725 Carissa mentioned would be fine.

    For the IBIS model, I checked around last night and cannot find one that fits the ADS8342 perfectly, however you may be able to use the IBIS model for the ADS8556 as a first order approximation.  Both devices have similar digital I/O cells, but the ADS8556 is a larger package and would have slightly different parasitic L/R/C components.

  • Tom,

    Ok I will apply the recommendation from you and carissa on our design.

    As for the simulation, is there no possible way to simulate upto the digital interface? 

    BTW, do you have a link for the IBIS download?

    If I use your recommended IBIS model can I simulate starting from the signal source, the analog front-end and to the ADC's digital interface?

    -Akerb

  • Hi Akerb,

    The IBIS models only simulate the digital I/O, they cannot accommodate the analog input so you would not be able to go from the source through the ADC front-end.  You can find the model for the ADS8556 here:

    http://focus.ti.com/docs/prod/folders/print/ads8556.html#toolssoftware