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SCLK serial output clock on ads1278 what option would work with a ftdi USB out chip to interface to the ads1278

josh wojnas
Intellectual 805 points
Other Parts Discussed in Thread: ADS1278

SCLK serial output clock on ads1278 what option would work with a ftdi USB out chip to interface to the ads1278?

I am looking at AN_108 command processor for the mpsse & host bus emulation mode from the ftdi site for the ft2232 chip.

6.11, 6.12 section of that sheet has two options that look like they work for DRDY data ready does the clock have to stop can it keep going?

I am trying to find a configuration option that would work...

they are for clock for nx8 bits with no data transfer until GPIOL1 is HIGH, or LOW depending on the opcode.

So if you could help me out here that would be great.

  • 0
    TI__Genius 17905 points

    Josh,

    As the FT2232 is a FTDI chip, I can only comment given what I read in the AN_108 document and the FT2232 datasheet.

    I think what you would need is to put the FT2232 in the mode described in Section 5.3 (command 0x89) followed by a read instruction. In that mode (0x89), the FT2232 will wait until the I/O1 (connected to /DRDY) goes low and then process the next instruction (the SPI read).