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ADS5401 and ADC12D500RF

Other Parts Discussed in Thread: ADS5401, ADS5409, ADC12D500RF, TIDA-00113

Hi, Dear TI Supporters: I have two questions to ask as below described.

1. We have a project that requires 800 MSPS ADC, please be noted, the 800 MSPS is one parameter of the project specified to our users, so as considering some redundancy, we want the ADC can actually run a little bit higher than 800 MSPS. Can ADS5401 run higher than 800 MSPS? For sure, ADS5409 can run 900 MSPS that meets our project, however, it is two-channel ADC, and we need only one channel,  and any of 2 channels of ADS5409 cannot be disabled individually, if two channels working at same time, it has a heat sinking issue for us that we have not enough space for the heating getting away. So, what is the solution?

2. Our project's input signal range staring from DC (almost, maybe a few of KHz), as the alternative, can we use ADC12D500RF that can run up to 1 GSPS? We noticed that any of two channels of ADC12D500RF can be disabled, but we are not sure whether ADC12D500Rf is working for our project.

 

Thank you very much.

 

Jason 

 

  • Hello Jason,

    Let me comment on point 2. The ADC12D500RF is a dual input ADC and can be operated in Dual Edge Sampling (DES) mode to achieve interleaved sampling up to 1Gsps. The inputs can be AC or DC coupled. There are also controls to power down Q-channel, I-channel, or both. Please refer to the following TI Design for more information on the different sampling modes:

    Driving GSPS ADCs in Single-Channel or Dual-Channel Mode for High Bandwidth Applications (http://www.ti.com/tool/TIDA-00113)

  • Hi, Luke:

    1. If use ADC12D500 for 1GSPS application, it must be working in DES mode, that means both Q and I channels work together, no channel is allowed to be disabled, so, the power consumption calculation should be based on two-channel working condition?

    2. What are the differences between ADC12D500 and ADC12D500RF?

    3. If we need 800 MSPS sampling rate only with using ADC12D500, can we just simple get the clock frequency down to 400MHz?

    4. For the comparison with ADS54xx serials, for example ADS5409, can we think that, each of  two channels of ADS5409 can run up to 900MHz that each channel consist of two-ADCs that work in Interleaving with dual-edge of 450 MHz clock, so actually ADS5409 has 4-ADCs while ADC12D500 has two only?

    Thank you very much.

    Jason W 

     

  • Hi Jason,

    Let me address your questions below:

    Jason(qx) Wang said:
    1. If use ADC12D500 for 1GSPS application, it must be working in DES mode, that means both Q and I channels work together, no channel is allowed to be disabled, so, the power consumption calculation should be based on two-channel working condition?

    Correct, both channels will be active during DES mode to achieve interleaved sampling up to 1Gsps. Power consumption in this mode will include both channels being powered on.

    Jason(qx) Wang said:
    2. What are the differences between ADC12D500 and ADC12D500RF?

    The key difference between the RF and non-RF 12 bit products are improvements to the front end circuitry to improve noise floor and linearity in the RF family. This results in slightly better SNR and better SFDR particularly with high frequency input signals. 

    Jason(qx) Wang said:
    3. If we need 800 MSPS sampling rate only with using ADC12D500, can we just simple get the clock frequency down to 400MHz?

    Yes, the minimum clock frequency is 200MHz for DES mode and 150MHz for non-DES.

    Jason(qx) Wang said:
    4. For the comparison with ADS54xx serials, for example ADS5409, can we think that, each of  two channels of ADS5409 can run up to 900MHz that each channel consist of two-ADCs that work in Interleaving with dual-edge of 450 MHz clock, so actually ADS5409 has 4-ADCs while ADC12D500 has two only?

     

    That is correct. The ADS5409 has 2 separate channels with 2 sub ADCs, giving a total of 4 ADCs. However, only 2 ADCs are interleaved to give sampling up to 900MHz. The ADC12D500 only has 2 ADCs total, which are interleaved to give sampling up to 1GHz. In both cases, only 2 sub ADCs are being interleaved at a time.

  • Hi,

    For the ADS5401, the device would probably function at a sample rate higher than the datasheet max but the device was only tested and trimmed for the data rate listed in the datasheet.  There could be no guarantees that any one device would work past the data sheet max limits.  The ADS5409 is tested adn trimmed in manufacture to support the higher data rate adn meet the datasheet specifications at that higher data rate.   I believe there *is* a way to turn off one of the two channels if you do not need two channels and of course do not want to burn the power for an unneeded channel.  There is a register bit in the SPI register space that can turn off channel B.  I expect this was thought to not be needed in the datasheet since there are single adn dual versions of the device - but as you noted we didn't make a single version of the device at the 900Msps sample rate.  I am told that we could add to the datasheet the description of the bit that would be used to turn off channel B.

    Regards,

    Richard P.

  • Hi, Luke:

    Thank you for the clearly answering.  I have a few more to inquiry below.

    1. In our project, there is one signal source only to be A-To-D converted, the bandwidth of the signal is about DC~200MHz, the desired sampling rate is between 800~900 MSPS. Based on my understanding of TI ADC chips, we have options between ADC12D500RF and ADS5409, that's right?

    2. If yes, in considering the power consumption,  ADC12D500RF should be better because its watts=2.02W, while ADS5409's =2.18W. Note that two ADS5409's channels cannot be disabled individually, even we need one channel only. Am I right?

    3. However, in considering performances, which of ADS5409 and ADC12D500RF is better? Could you contribute any suggestion?

     

    Thank you very much.

    Jason W

  • Hi, Richard:

    Just two things below.

    1. For the ADS5401, the Max sampling rate in the datasheet is 800 MSPS. We want to confirm that TI has each of ADS5401 tested at this Max sampling rate?

    2. Could TI let us know the way and the internal register bit that to disable the one channel of ADS5409 as soon as possible, in advance, before the updated version of datasheet issued?

    Thank you very much.

     

    Jason

  • Hi,

    The device will always be tested to support the max sample rate shown in the datasheet. 

    The register bit to turn off channel B is in register address 0x02 and is bit D11.  Set this bit high and the ADS5409 becomes a single channel ADC with only channel A active.   I just tested it on the bench, going back and forth between one channel active and both channels active. 

    Regards,

    Richard P.