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ADS1220 24bit ADC internal clock?

seb
Genius 4170 points
Other Parts Discussed in Thread: ADS1220

Hi,

seems like TI did some confusing Datasheet for the ADS1220.

I just want to know how fast the internal clock runs, when the CLK pin is connected to digital GND, like it is recommended in the datasheet.

There are some confusing statements for external and internal clock.

it says external clock range, 0,5 .... 4,5 MHz that would be ok, i understand this.

Now the internal oscillator it states only values for accuracy and only for the normal mode, which refers to voncersin speed, this is ok i undertsand it.

But what is the internal clock now???

I suppose it is 4,096 MHz, but this is stated nowhere in the datasheet.

So please TI feel free to forward this to a designer who probably takes 1 second to respond.

Thank You.

Seb

  • 0
    TI__Guru** 113765 points

    Hi Seb,

    Believe it or not we did not state the internal clock timing on purpose.  The simple answer is because it is much more complicated to explain both the operation of the internal clocking and the external clocking.  As the internal oscillator has no direct output, all that most user's will need to know is how the timing relates to the output data rate and the number of cycles required for startup, powerup, etc..  This is much easier to explain once as it relates to the external oscillator as this is the only option that is directly adjustable.

    As to the statements with respect to scaling and accuracy you can use the numbers as they relate to the 4.096MHz external oscillator.  The key parameter is really the modulator rate which is 256kHz in normal (or duty-cycled) mode when using the internal oscillator.  Using an external oscillator at 4.096MHz also produces a 256kHz modulator clock in normal (or duty-cycled) mode.  In the case of turbo mode the modulator rate doubles to 512kHz.  This is all very easily explained using one external frequency of 4.096MHz and Tables 7-9 of the ADS1220 datasheet are examples.

    The discussion and tables become much more complicated if we try to explain that in one case using an external oscillator the number of clock cycles differs as compared to the timing in normal (or turbo) mode using the internal oscillator.  So to keep it less complicated we use one 'standard' frequency as in the end it really doesn't matter.

    To keep the power as low as possbile the internal oscillator is running at 1.024MHz in normal/duty-cycled modes.  It runs at 2.048MHz in turbo mode.

    Best regards,

    Bob B

     

  • 0 in reply to Bob Benjamin
    Genius 4170 points

    Ok I got that, to state a real life question:

    How do I calculate Sample and Hold time from the "unknown" internal clocks?

    in the datasheet there is one page which states the clock-cycles needed to calculate a ADC result for 20SPS to 1000S
    PS in normal mode, which I am using right now.

    In fact I want to measure with 175 SPS, because I need the maximum accuracy faster than 9ms measurement-timing.

    If I do the calculation with the 4 MHz clockcycle it comes out quite right, something like 5,85 ms, I also did use some testpins and so on to measure those timings with my oscilloscope and it comes out right, so I guessed it has to be an internal 4MHz clock speed.
     In my layout the CLK pin is tied to DGND like it is recommended in the datasheet, also I do not have an extra line free to put an external 4,096 MHz clock on this pin, so I do wanna stay on my design.

    Now you did state that

    Bob Benjamin said:
    1.024MHz in normal/duty-cycled modes

    this now is hard for me to believe since than my timing would be off a factor of 4, which I know is not true, so could you please explain me what you meant with it?

    In my believe I do all the calculations with 4 MHz and the modulation frequencies of 512 kHz and 256kHz are used internally for something, I dont know, like sample speed, calculation speed, something internal  of the semiconductor I guess.

    Thank You.

    Seb

  • 0 in reply to seb
    TI__Guru** 113765 points

    Hi Seb,

    Maybe you can now understand why we don't include the exact internal oscillator timing as it becomes very confusing.  In all cases, whether it be internal or external, the modulator frequency determines the output data rate.  The modulator rate is the actual sampling frequency.  In normal mode this is 256kHz or twice that frequency in turbo mode which is 512kHz.  The modulator output is digitally filtered using an FIR filter.

    When using the internal oscillator the information in the table with the clock cycles required for using an external oscillator at 4.096MHz will need to be adjusted.  As I stated in my previous post what really matters is the modulator frequency.  I will use normal mode as an example.  If you divide 4.096MHz by 256/kHz you get 16.  So when using the external clock input the clock is divided by 16 to get the modulator frequency.  Doing the same math for the internal oscillator the factor is 4. If you divide 16 by 4 you get the factor of 4 that you calculated.  For the end result you would need to divide the number of required clock cycles by 4 if you use the internal clock frequency.  An easier method would be to multiply the internal oscillator clock by 4 and use the same number of cycles shown in the datasheet.

    As I said before, we would need a different table for each mode setting for the internal clocks and the external clock.  It is much easier to consider all the timing as it relates to just one clock input.  If you take the internal clock oscillator frequency and multiply by 4 (which is the difference in clock divider) than all the numbers will match the table.

    I'm going to guess as to what your real concern is at this point.  I'm guessing that you want to know how much the data rate can change from device to device and over temperature.  On page 4 of the datasheet, the internal oscillator can vary by +/- 2%.  You should get the same number if you multiply 175sps, or the internal oscillator (times 4 times the number of clock cycles) or the external clock frequency of 4.096MHz (times the required number of clock cycles) by +/-2%.

    Using the 4.096MHz frequency as it relates to the external clock period when using continuous conversions and normal mode it takes 23664 clock periods to complete a conversion.  The frequency can vary by as much as 2% in either direction from the nominal.  This is 4.17792MHz at the fastest with a period of about 239ns.  The conversion period is 23664 times 239ns or about 5.664ms.  The opposite end will be 4.01408MHz with a period of about 249ns resulting in a complete conversion cycle in 5.895ms.  The calculated data rates will run from about 176.6sps to 169.6sps.

    If you actually use the +/- 2% of 175sps you will see slightly different values (178.5 to 171.5) as the 175 number is a rounded value to start with and should really be 173.1sps to be more accurate.  Notice that in any case the difference is about +/- 3.5sps from the nominal (176.6 to 169.6).

    Using one other calculation to prove what I'm saying, if you take 1.024MHz * +/-2% and multiply the result time the factor of 4 you will get the same range of results (4.17792MHz to 4.01408MHz) which will also calculate to the same data rate results.  If you wanted you could just look at the period and vary by +/- 2%, as this will also yield the same results.

    If I have misunderstood the intent of your question please let me know and I will try to explain further.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Genius 4170 points

    Hello,

    thanks for th elong and detailed answer, although i am having a little bit a hard time translating all your information into my real physical in front of me real world questions :), if you dont mind my expressions.

    Imagine this: Cut out all the information and lets say this, I describe my intentions and then i chose the ADS1220 to solve them.

    I want 24bit of resolution so I chose the ADS1220.

    Next thing, I want to measure a toggling LED output, since I dont want the eye to recognize the toggling I toggle the LED every 9ms. This means my light sensor has a changing signal all 9 ms too.

    This is where my timing constraints come into play.

    That is why I did choose 175 SPS, since it relates to under 9 ms of measuring time.

    I dont wanna bother myself with external clock signals so I chose the ADS1220 with grounded CLK pin, great it is working :)

    Now I want to see if all signals and measurment timing are in spec, so I pull out the oscilloscope and now I start wondering where the timings come from so I find some useful information in the datasheet about conversion time etc. But what is missing is the actual clock speed of the internal oscillator.

    I know from my measurment the mas o menos timings, and they all relate to 4,096 MHz clock, but this is not printed nowhere, so I thought I just ask.

    Now I dont know yet what to do with all your information. Could I use a faster internal clock somehow to even get better faster results?

    What is your misterious way of telling me that the internal clock is not determined?

    Cant we just say internal clock is 4,096MHz?? Or is that plain wrong? Since my measurment tell me the internal clock must be around 4MHz, otherwise my timing would never fit?

    Thank You a lot.

    Seb

  • 0 in reply to seb
    TI__Guru** 113765 points

    Hi Seb,

    I certaintly do not want to confuse you.  You cannot change the internal clock timing as it is a fixed value.  The only thing you can change is the data rate for a complete conversion cycle.

    All internal timing is the same as using an external clock of 4.096MHz so use this value for your calculations even though the internal oscillator is not this frequency.  As there is no place for you to probe the internal oscillator, the only way that you can measure the variance is by measuring the DRDY pulses while in continuous conversion mode at the high to low transition.  I have already given you the range that ADS1220 can vary at 175sps in my previous post.  There is no need to even measure it or calculate it using the timing tables.

    I think you are misunderstanding the key point.  All clocks whether generated from the internal oscillator or from an external clock are divided down to the modulator clock frequency.  It doesn't matter if the clocks are faster or slower if the clock division ends at the same frequency.  The internal clock is divide by 4 and the external clock is divide by 16 (normal mode) to get 256kHz.

    Best regards,

    Bob B