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Not getting proper reading on ADS1259.

Other Parts Discussed in Thread: ADS1259

Dear All,

For one of my project I am using ADS1259 to sense the analog input range from +/-2.5V. The ADS1259 is configured with the following configuration registers.

#REGISTERS 

CONFIG0 = 0x85;   // Internal reference bias enabled, SPI timeout enabled
CONFIG1 = 0x10;  // Flag out of range disabled, Checksum disabled, sinc2 filter enabled, internal reference                                                 enabled, no delay
CONFIG2 = 0x15;   // 1200 SPS, Pulse Control Mode Enabled, SYNCOUT disabled, Device clock source is internal                                     oscillator.

But during the test I have found that the measured voltage is 10 to 12 mV at the full scale. Ans also the reference voltage which I am using is internal reference, but as per data sheet with internal reference  the REFOUT pin should have 2.5V but when I checked this I am getting 0 V.

The system which we used for testing the ADC is Keithley 4200. For your reference I am attaching the schematic and the readings.

Please help with this issue.

4188.Schematic & Readings Ads1259.zip

  • Hi R_Sam,

    When you power up the ADS1259, do you measure 2.5V between REFOUT and AVSS?

    (Note: Measuring REFOUT and GND will be 0V on a bipolar supply)
    By default, the internal bias will be enabled, so this is a good first check to make sure the device is working. If your reference voltage is zero, than the ADC results would be garbage.

    Once you've verified that the ADS1259 is powered up properly, test the SPI communication. Try writing to the device registers and reading them back. I have seen SPI communication problems caused by the isolation (check that you don't have digital pins floating somewhere).

    Here are some additional questions I have to help me troubleshoot the issue:

    • What is your SCLK frequency?
    • What SPI mode are you using (CPOL, CPHA)?
    • How are you determining that your conversion data is valid? Are you polling the ADS1259's CONFIG2 register to see the state of /DRDY?
    • Could you probe the SPI communication at the ADS1259 and provide a screenshot? (Often times the SPI timing will look fine at your Master, but it may lose it's integrity by the time it gets to the Slave).

    Best Regards,
    Chris