ADS1120 / Pseudo-Differential Input

K.Yaita

Other Parts Discussed in Thread: ADS1120

Hi Team,

There is the following description about "Pseudo-Differential Input" in datasheet page22.

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In contrast, the signal of an RTD is of a pseudo-differential nature (if implemented as shown in the RTD
Measurement section), where the negative input is held at a constant voltage other than 0 V and only the voltage
on the positive input changes. When a pseudo-differential signal must be measured, the negative input in this
example must be biased at a voltage between 0.95 V and 2.25 V. The positive input can then swing up to
VIN (MAX) = 100 mV above the negative input.

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I can't figure out the yellow part. How can I calculate for 0.95V and 2.25V?

I apologize if this is a basic question.

Best Regards,

Yaita / Japan disty

over 10 years ago

0 Bob Benjamin over 10 years ago

TI__Guru** 113765 points

Hi Yaita-san,

For all common mode calculations, the requirements must be met as given in equations 13 through 15 of the ADS1120 datasheet. I think what may be confusing is the calculation of the example on page 22 as compared to the RTD circuit. The RTD circuit is measured ratiometrically using the current through the bias resistor as the reference voltage. This will establish the full-scale range which in turn will determine the amount of gain that can be applied.

In the example given on page 22 the maximum voltage applied to the input is 100mV. Also the reference voltage used in the calculation was 2.5V. This allows for a maximum gain that can be applied as 16. The minimum common mode must meet two equations. First let's simplify using the voltages of the example that is also the same as the RTD circuit which has AVDD as 3.3V and AVSS as AGND. The first equation (15) requires that the common mode voltage be at least 1/4 of the supply (3.3V). 1/4 of 3.3V is 0.825V. The second equation (13) that must be met states that the minimum common mode must be 0.2V above AVSS plus 1/2 the gain applied times the maximum input voltage. This is 1V (0.2 + 16/2*0.1V). This will require that the minimum bias voltage that can be used is with a common mode of 1V is 0.95V which is the common mode voltage minus 1/2 input voltage (1V - 100mV/2).

The upper common mode boundary is based on equation 14 where the maximum common mode voltage is AVDD -0.2V less 1/2 the gain applied times the maximum input voltage. This becomes 2.3V (3.3V - 0.2V - 16/2*0.1V). The maximum voltage for the AINN input (which is also the bias/reference voltage) will be 50mV less than the maximum common mode voltage, or 2.25V.

There are some other considerations when using an RTD that is excited by the IDACs. The main consideration is the IDAC compliance voltage which is AVDD - 0.9V. For the above example this is 3.3V - 0.9V which equals 2.4V. If the common mode is at the maximum, the AINP input will be at 2.35V (2.3V + 100mV/2) which is within the compliance but with little margin.

However the conditions have actually changed if the reference voltage is something different than 2.5V or if a different gain is used. So to make sure that the conditions will still hold, the common mode calculations should be checked again for the actual conditions being used. For example, if 0.95V is used as the bias voltage for AINN this means that the full scale range has been reduced. The maximum gain is now 8. It is this condition that you must be careful as it would appear that the common mode voltage could be reduced further to 0.6V (AGND +0.2V + 8/2*100mV). Remember that equation 15 must still be met as well which was 0.825V (1/4 of AVDD). For the maximum common mode you would calculate 2.7V (AVDD - 0.2V - 8/2*100mV), but this is now outside of the IDAC compliance voltage of 2.4V. It is always a good idea to recheck the common mode voltages relative to the component values used and IDAC current to verify that requirements are met for equations 13 through 15 and that the IDAC compliance is also met given the maximum temperature to be measured.

Best regards,

Bob B

0 K.Yaita over 10 years ago in reply to Bob Benjamin

Guru 29720 points

Hi Bob-san,

I appreciate for your support.

My customer considers to use ADS1120 under the following condition.

- AINP=1.5V±0.7V(max)

- AINN=1.5V(constant voltage)

*AVDD=3.3V, AVSS=AGND

When Gain=1, I calcurated as below.

- equation 13: VCM(min) = 0.9V (AGND + 0.2V + 1/2*1.4V)

- equation 14: VCM(MAX) = 2.4V (3.3V - 0.2V - 1/2*1.4V)

- equation 15: VCM(min) = 0.825V (1/4 of AVDD)

So if Gain=1, I believe customer's condition meets the requirement of equations 13 through 15.

On the other hand, Gain=2 seems to deviate from the requirement.

Is my understanding correct?

Best Regards,

Yaita

0 Bob Benjamin over 10 years ago in reply to K.Yaita

TI__Guru** 113765 points

Hi Yaita-san,

You used a range of +/-0.7V, but because AINN is fixed at 1.5, the common mode will not shift as much. The Vin(max) will never be more than 0.7V above or below the AINN input. The actual results using gain of 1 will be as follows:

- equation 13: VCM(min) = 0.55V (AGND + 0.2V + 1/2*0.7V)

- equation 14: VCM(MAX) = 2.75V (3.3V - 0.2V - 1/2*0.7V)

- equation 15: VCM(min) = 0.825V (1/4 of AVDD)

Your previous calculations are twice what they should be for a gain of 1, so when using a gain of 2 the values previously calculated would be correct. This means a gain of 2 will work. A gain of 4 will not work when using the internal reference as you will be over range for the input (full scale range is +/- 0.512V at a gain of 4).

Best regards,

Bob B

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ADS1120 / Pseudo-Differential Input