Using internal CLK. SCLK is 1mhz. Start pin is high. 1st command sent is SDATAC. Trying to write/read verify GPIOCFG with a 0x03. Always 0x00 the first read. A second write/read works.
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Using internal CLK. SCLK is 1mhz. Start pin is high. 1st command sent is SDATAC. Trying to write/read verify GPIOCFG with a 0x03. Always 0x00 the first read. A second write/read works.
Chris,
The first picture looks like its 40 00 03, and I think you want it to be 4C 00 03. That would write to the MUX0 register. Can you try that again?
Also, after issuing the SDATAC command, do you wait for the next DRDY pulse before writing to the register? The SDATAC doesn't become active until the conversion completes. I don't think that would matter, but I thought I'd ask.
Joseph Wu
Thanks,
Found the bug in selecting the appropriate register as you pointed out.
-Chris