Hello TI,
The previous post seems to have disappeared so will start a new one. Here's some context and the open question is in RED below.
For 6 inputs at 1GSPS, the ADC08D1020 is the best solution.
>>> OK, for six inputs, will use the ADC08D1020 with 1GSPS sampling rate.
With the ADC08D1020 (quantity of three devices), in 1:1 (non-demux), the output data will be at 1 Gbit/sec on six 8-bit LVDS buses. The DCLK will be operating at 500 MHz (DDC clocking).
If that data rate is too high, they could operate the devices in 1:2 demux mode at 500 Mbit/sec. This will be on twelve 8-bit buses. The DCLK can operate in either DDR mode at 250 MHz or SDR mode at 500 MHz.
>>> OK, for six inputs, will operate in 1:2 demux mode at 500 Mbit/sec. Will output on twelve 8-bit output data busses, DDR mode at 250 MHz.
>>> One last question for six inputs. Lets say I wanted reduce the sampling rate to 500 MSPS, use the ADC08500 as a drop in replacement. Could I then just use the SDR mode at 250 MHz and output on both DI/DId data busses?
Thanks,
Dan
