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DDC264 EVM

Other Parts Discussed in Thread: DDC264EVM

Hi Bob,

I am a student in Lanzhou University of China. We use DDC264EVM for data acquisition, and we have programmed to achieve a continuous data collection, but when the continuous acquisition of about a few hundred times, there will be mistakes, that FPGA can not be written, then the collected data is 0. When we reset the Switch S2, the working of DDC264EVM back to normal. Pressing the switch S2 resets the FPGA to power-up conditions. What is the problem we have? How to solve it?

Regards,

Cui  Zhang

  • Hi Cui,

    Unfortunately I have not worked with this product in a long time as the product group/forum I work for does not provide applications support for the DDC products.  I will transfer this question to the appropriate forum.

    Best regards,

    Bob B

  • Cui,

    I am the applications engineer for the DDC product line. The problem you are seeing can occur because of many reasons. One thing I would check is that you are not trying to acquire data too fast. In the lab we use the EVM with the standard GUI which is not setup for continuous capture and occasionally I will see this issue if I try to acquire sets of data too soon after one another. The FPGA might not be ready to provide another acquisition when you are requesting one and this is causing some type of lockup. I cannot give you a definitive answer as this is your code and we do not use the EVM for continuous capture. One recommendation I have is to add some error checking in your code. If the system receives "0" data, you can control the power supplies to reset the EVM power or assert the board reset automatically and avoid the lockup.

    Regards,

    -Adam Sidelsky

  • Bob,

    Anyway,thank you very much!

    Best regards,

    Cui Zhang

  • Hi Adam,

    Firstly,Thank you very much! In our work,we have tried kinds of waiting time between two collections,the longest waiting time is 10s,but it also will have mistake after a continuous collection of about a few hundred times. So we think the time is not the problem. And now we try to control the power supplies automatically and avoid the FPGA lockup. The question is what is the solution to control the power supplies automatically ? By program or hardware?Can the DDC264EVM Application Software achieve it?

    Best regards,

    Cui Zhang

  • Cui,

    What I mean in delay is between each of the samples in the "few hundred" continuous collections. Try increasing the time between each of these discrete samples within the continuous stream.

    How are you powering the board at the moment? If you are using a bench power supply then you can easily use a control interface like GPIB to automatically control the power supply. What environment is your software written in? If it is something like C, Java, or LabView then there are common libraries available to control GPIB instruments. I can help you further with more information from your side. 

    Regards,

    -Adam

  • Hi Adam,

    I have some problems.I used USB and J5 to supply power for the DDC264EVM,There were usually eight indicator light.but now,the LED indicator of D2(FPGA configuration is done) and D8 does not light.Is the FPGA broken? We often on-off the FPGA power supply before that. Do you have some suggestions?

    Regards,

    Cui Zhang

  • Cui,

    I have seperated your post into a different thread because this one is different and already complete. Please see the other post and my response here: http://e2e.ti.com/support/applications/high_reliability/f/30/t/388464

    Regards,

    -Adam