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Demo Code between ADS1274 and 320F28835

richard payne
Genius 4640 points
Other Parts Discussed in Thread: ADS1274, ADS1278EVM-PDK, CDCE913

Hi (Greg Hupp)

After reading several article on ADS1274 including McBSP interface diagram.....

Would you by any chance have demo code to shown configuration on McBSP that successfully stream data between ADS1274 to Dual Port RAM via DMA.

My concern that I like to place 16 bits raw data into Dual Port RAM from 24 bit data or frame data chuck.

I like to use two channel initially and then upgrade to 4 channel in future. 

If there is no demo code, can you give us guideline so I can develop code that would work...... for 320F28835.

Thanks.  

  • 0
    TI__Mastermind 23235 points
    Hello -
    The only sample code that we can provide is for the ADS1278EVM-PDK (works with ADS1274 also). This EVM source works with the C5507/9 DSP. Let us know if you would like more information on this source.
  • 0 in reply to Greg Hupp
    Genius 4640 points

    Hi Greg, thank for reply.......I take a look in EVAL material

    The McBSP diagram of Concerto and ADS1274, in framesync part does not look like it working concept because it suggest framesync is generated by ADS1274 which is in conflict with ADS1274 datasheet. The DRDY in framesync description is a confusing part......I assumed the diagram is for SPI, but framesync description suggest otherwise.

    Based on reading from McBSP and ADS1274 datasheet......


    In order for F28335 to framesync correctly it seems, it has keep in sync with CLK input (say 1MHz to 10MHz), this CLK is generated by CDCE913 to give finer resolution than F28335 clock source. This CLK in turn determine the data sample rate, so I have to connects this to F28335's McBSP MCLKR pin which drive to generate framesync (connect to FSYNC), the SCLK seem to me a same freq as CLK (from CDCE913), correct?

    It seem clear from ADS2174 and McBSP, the CLK determine the timing of FSYNC and SCLK, so ADS2174 is master in providing the clock (via CDCE913) and drive the McBSP as slave. Please correct me if I'm wrong.

    This is how I see it.........

    <Attached>

    Should I ties CLK and SCLK together to MCLKRA driven by CLCE913 clock source?

    I'm not sure what to do with CLKX and FSX?

    I appericate your quick reply on this matter........I need design to work before layout.

    R.