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ADS1274 CLK duty spec

richard payne
Genius 4640 points

Is there duty spec for FCLK in term, are they sensitive to variation of duty?,

Can it work say 10% duty

Thanks.

  • 0 in reply to richard payne
    TI__Mastermind 23275 points

    Dear Richard,

    our application engineers responsible for this device are already on vacation. It might probably take one week till we can definitely confirm if duty-cycles as low as 10% are possible.
    According to the datasheet (timing parameter t_CPW, p.8 in the datasheet) the duty cycle in SPI mode could be as low as 0.15% when running at the slowest f_CLK rate of 100kHz. But I don't believe this is really possible. At the highest f_CLK frequency of 27MHz the duty cycle is limited to 40%.

    Jitter on the clock signal will have a negative effect if you try to measure AC signals. The higher the frequency of the signal the larger the effect will be.

    Regards,