DAC121S101 initial and total accuracy

Hi John,

"Given the low load is it acceptable to use FSO @ 10uA = Va-10mV?"

Yes, it is acceptable if a bit pessimistic given the EC table in the datasheet.

"Are the Gain Error = GE = ±1% FSR  and Full Scale Error = FSE = -1% FSR additive?"

Gain Error, in this case, is defined as the sum of  Zero Code Error and the Full Scale Error. But all of these quantities are random variables and should be added in the RSS sense.

 "Is GE applied as ±1% of the setting?"

The way the GE is defined for this part, the GE should not be applied directtly to the input code to obtain error voltage at that code --- this would yiled overly pessimistic estimate.

" Are these reduced due to the light load?"

ZE and FSE do improve at loght loads as indicated in the DS (say, compare FSE and FSO: these are really the same measurements only the latter is with load)

"Does ZCO A 10uA = 6mV max override Zero Error = ZE = +15mV"

In your case, probably not. --- see my commentary further down.

"Is INL 48 to 4047 = ±8 LSB (±6.5mV this app) applied over the whole 48 to 4047 range, or are there reductions that can be made as the signal approaches the limits?"

The INL reported in the DS is the "End-Point INL" which forces the INL to zero at the and codes 48 and 2047. Anywhere in between the DAC output may deviate from straight line by as much as 8 LSBs.

"Is there any other information (Like a shaded area graph) that defines the worst case limits (or RSS limits) over the whole range?"

No. The worst case perfromance is already reported. The worst case is always near the extremes of the DAC output range (near the rails) - hence we chose to report linearity in the range of 48 to 2047.

 "Most importantly, once the IC is in a circuit and tested, how much change in the operation could occur beyond (ZCED) Zero Code Error Drift  and (TC GE) Gain Error Tempco?"

Again, due to the definitions in the DS the ZCED, GE tempco will have their greatest impact near the rails, say for input codes below 48 and above 2047. In the rmaining span, 48 to 2047, the accuracy performance will be dominated by the VA source, and INL (a reference to the DAC).

COMMENTARY:

The definitions of ZE, ZCO, FSE and GE are dominated here by the perfomance of the output buffer that follows the DAC resistiove string. Jsut like any class AB device, the buffer is not capable of pulling its output all the way to the rails, hence the deviations from the ideal straight line near the rails.

If your application indeed forces the DAC to operate near extremes, then the DS already gives you a good guidence on the accuracy performance of the device. However, if your DAC operates in the range 48 to 2047 (buffers ourtput is sufficiently far from the supply rails), the accuracy performance will be far better than that reported in the DS.

Hope this helps.

Sincerely,

tom