Hi,
We have been using the VSP2582 device on a product for many years and its is working very well.
We just got a new batch of hardware in and we are experiencing bit issues on some of the new hardware.
I have been able to verify the data path from the FPGA outputs through our camera link (using a test pattern generated in the FPGA) but I cant be sure the data out from the VSP is getting in to the FPGA correctly. I noticed in the VSP datasheet that there is a "test enable" feature and had hoped that this was perhaps some kind of test pattern that the VSP would send to help me verify the data path. Unfortunately on enabling the bit as stated in the datasheet nothing happens? I was wondering if you had any more information of what the "test enable" actually does and perhaps if there are any hidden features in the VSP like a test pattern output that I could enable via the serial interface to help me debug this bit issue?
I am confident that my serial interface to the VSP is correct as I can change the PGA and put the VSP into standby fine.
Any input would be appreciated.
Regards,
Chris
