Conflicting datasheet specs for DAC8814 Clock Input Frequency and Clock Width High/Low

Other Parts Discussed in Thread: DAC8814

We're using a DAC8814 in our application. However, the datasheet appears to provide conflicting specifications for the DAC8814 Clock Input Frequency (fclk) and Clock Width High/Low (tch/tcl).

Fclk = 50MHz min
tch/tcl = 10ns min

The only frequency where the above are satisfied is exactly 50MHz. It appears to me that one of the above needs to be defined as a maximum. Should the datasheet be revised to state the following?

Fclk = 50MHz max
tch/tcl = 10ns min

Thanks,

--Todd W

over 10 years ago

0 Eugenio Mejia over 10 years ago

TI__Genius 10615 points

Hi Todd,

You are correct. This is a typo, it should be Fclk = 50 MHz max. I will add it to a list of errata.

Thank you very much for your input. Your help is greatly appreciated.

Data converters

Data converters forum

Conflicting datasheet specs for DAC8814 Clock Input Frequency and Clock Width High/Low