DDC264EVM channels and chips configuration

Mohd Zulhadi Zainal Abidin83

Prodigy 100 points

Other Parts Discussed in Thread: DDC264

Hallo,

We are currently evaluting the DDC264 chip using the EVM.

There are 4 DDC264 chips in the EVM (U101,U201,U301,U401) and the software with channel from 1 to 256

Is the configuration as follow:

U101-->Ch1 to Ch 64

U201-->Ch 65 to Ch128

U301-->Ch129 to Ch192

U401-->Ch 193 to Ch256

or the other way around?

Could someone confirm it.

Thanks

over 10 years ago

0 Adam Sidelsky over 10 years ago

TI__Guru 65420 points

Hello,

On the DDC264 EVM, DUT U101 is the master DOUT or the last device in the serial output chain. All DDC264 devices output their highest channel (channel 64 in this case) first. This means that GUI channel 256 corresponds to the first channel output by U101. The exact channel order can be easier explained through the attached excel document.

Regards,

-Adam

DDC264 EVM Channel Map

0 Mohd Zulhadi Zainal Abidin83 over 10 years ago in reply to Adam Sidelsky

Prodigy 100 points

Hallo Adam,

Just the right answer I'm looking for.

Thanks Adam!

Best regard,

Zulhadi Zainal

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DDC264EVM channels and chips configuration