We are reading several analog channels with an ADC128S102WGRQV A/D converter.
Occasionally (about 7/100K readings) there appears to be some rollover issue when reading two of the channels.
One channel is reading 2.5V and the other is reading 1.25V.
For instance:
On the 2.5V channel, in a long string of readings, a reading expected at 0x800-0x7FF, errors with reading at 0x8FF-0x8FE high or 0x700-0x703 low.
–Expected: 0x800-0x7FF
–Actual:
»2014-12-09 00:43:50 1793 0x701
»2014-12-09 16:59:27 2303 0x8ff
»2014-12-09 17:03:31 2302 0x8fe
»2014-12-09 17:27:58 1795 0x703
»2014-12-09 17:32:03 2303 0x8ff
»2014-12-09 17:36:07 1793 0x701
»2014-12-09 18:04:39 2303 0x8ff
»2014-12-09 18:12:48 1792 0x700
If you flip the 7's and 8's in the third nibble in the failure points, you get near the nominal values.
The 2.5V channel readings from above are the spikes shown below appearing randomly among many good readings.
On the 1.25V channel, in a long string of readings, a reading expected at 0x400-0x3FF, errors with readings at 0x4FF high or 0x300-0x303 low.
–Expected: 0x400-0x3FF
–Actual:
»2014-12-08 10:43:16 768 0x300
»2014-12-08 10:47:20 769 0x301
»2014-12-09 00:46:14 768 0x300
»2014-12-09 16:14:59 1279 0x4ff
»2014-12-09 16:19:04 771 0x303
»2014-12-09 16:57:47 1279 0x4ff
»2014-12-09 17:01:51 1279 0x4ff
»2014-12-09 17:05:56 1279 0x4ff
If you flip the 3's and 4's in the third nibble in the failure points, you get near the nominal values.
The 1.25V channel readings from above are the spikes shown below appearing randomly among many good readings.
We have eliminated settling time, FPGA timing, S/W driver, display processing, AGND, +/-!2V, +5V, +3.3V_ANA, test source, cabling and test chamber noise as the problem.
Based on the above we are speculating that the A/D converter could have a sensitivity to nibble roll-over boundaries.
All the know occurrences happened at cold temperatures ranging from ~0 to -20C.
All occur only on these two channels that are on the nibble boundary (i.e. 0x7FF, 0x800 and 0x3FF, 0x400).
Other channels reading similar analogs but not with voltage at a nibble boundary do not exhibit this behavior.
The 2.5V channel is the first analog in a 16 channel mux which is input to the ADC128 IN0 channel after gain and buffering. The 1.25V channel is the second analog channel in a different 16 channel mux which is fed into the ADC128 IN2 channel after buffering.
Is a rollover of this kind a known issue with the ADC128S102WGRQV?
Does this appear to be a problem only with this actual part on the board or have others experienced this problem?
