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Question about AMC1305x

ryuji asano
Intellectual 800 points

Hi, I'm disty of Japan.
I have question about AMC1305x.

I saw this document.
http://www.tij.co.jp/jp/lit/an/slyt597/slyt597.pdf

Does AMC1305x have dual-capacitor isolation barrier?
Even if one side of the capacitor is destroyed if, is one side is not broken structure?
Does not AMC1305 short-circuit mode destruction definitely?

Please teach me.

Best Regards.


 

  • 0
    TI__Genius 9975 points

    Hello Ryuji-san,

    Yes, the AMC1305x has dual-capacitors in the isolation barrier structure.

    Depending on the failure mode, it is possible that one of the two means of galvanic isolation fails open; in that case, another over-voltage stress event will be less likely to cross the un-broken isolation barrier because it has an open circuit in the path. Furthermore, even if one side of the isolation barrier fails short, unless the over-voltage remains in place, the isolation barrier could still withstand about 1/2 of the original isolation specification.

    This redundancy is essentially what devices offering reinforced isolation provide.

    Hope this helps.

    Best regards,

    Jose

  • 0 in reply to Jose Duenas
    Intellectual 800 points

    Thank you very much Jose-san!

    It's good information.
    Your answer makes me happy.
    Please teach me more.

    When if one side of the capacitor is broken, How do I recognize it?
    Does AMC1305x output any signal? Is from any pin?

    Please help me.
    Best regards.

  • 0 in reply to ryuji asano
    TI__Genius 9975 points
    Hello Ryuji-san,

    You are very welcome.

    If only one out of the two capacitors in the data or clock path are damaged then the device will stop operating. The specific state of the data line will depend on what the exact damage is and is unpredictable; but it will not match the typical output expected from the AMC1305 (see Figure 47, page 20 of the datasheet).

    If both capacitors are damaged or any further portion of the IC is damaged, then (in addition to the phenomenon above) there will most likely be a increase in the quiescent current of the device and the clock pins (normally consuming less than 1 uA) will consume higher than normal currents.

    Hope this helps.

    Best regards,

    Jose