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AMC1305 data output "changed" after connect to FPGA Development Kit

user4185739
Prodigy 30 points

Hi

We use AMC1305 as a current sensing by the circuit from tidu499a (http://www.ti.com/lit/ug/tidu499a/tidu499a.pdf)  Figure 21.

Here is our implement circuit:

The DOUT of the AMC1305 before connect to FPGA Development Kit (CH1:CLKIN=20MHz, CH2:DOUT of the AMC1305)

The DOUT of the AMC1305 after connect to FPGA Development Kit (CH1:CLKIN=20MHz, CH2:DOUT of the AMC1305)

Why the data output changed?

Will this influence  the data read by FPGA?

In addition, I want to check the wave of AMC1305 DOUT correct or not

Would you please provide some experiment results?  Ex: Full-scale at 50mV (Max) and -50mV (Min)

Thanks!

I have another question about the decimation filter:

Verilog codes follow the pages 16 and 17 in AD7401A datasheet(www.analog.com/.../AD7401A.pdf)

But the output value is wrong...

Have any suggestion about this?

Thanks!

  • 0
    TI__Guru**** 181021 points

    Hi user4185739,

    What FPGA kit are you using?  The DOUT of the AMC1305 seems to be getting loaded down by something - it looks like there might be a large R/C in series or perhaps it's caused by a port setting on the FPGA I/O pins.  I'm not sure what the issue might be with the Verilog code you refer to in the post, but you can look through the SBAA094 reference in TIDU499 which also points to decimation filter code.