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ADS1298 Right Leg Drive (RLD) problem

Other Parts Discussed in Thread: ADS1298

Hello TI experts,

I'm having some problems with RLD settings.

I searched in FAQ section, forums section but I think I didn't find any useful informations for me.

In my ECG application using ADS1298, currently 3 channels (basically only 2) are used. My configuration is as follow:

LL = CH3_P

LA = CH2_P

RA = CH2_3_N - Negative for LL and LA.

So far so good, I can set Lead1,2,3 without any problems with this configuration.

Lead off detection for CH2P and CH3P works great, but if I remove RA (negative on both) then everything is off.

Understandable, I don't have RLD setup yet.

Now about RLD.

I want to have RLD voltage in the middle of my voltage supply, so 3.3 / 2 = 1.65V.

I looked at RLD_SENSP and RLD_SENSN registers but I have no idea how to set this up. Datasheet about RLD is not so good written and I can't get what it want from me.

Can you please suggest me how can I do that?

I have 1M resistor between RLD_OUT and RLD_INV pins. I know I have to setup gain to be what I want but I don't understand the negative/positive output from figure 68 in ADS1298 datasheet on page 71.

I hope you are able to make some examples how to set this up corretly from figure on page 71.

  • Hi Tilen,

     

    Great questions! The RLD amplifier and the passive components that are placed on the RLDINV and RLDOUT pins form a negative feedback controlled system which is used to cancel the common mode noise that is ubiquitous on the human body. It can be used in several different ways, but all can be understood looking at Figure 68 in the datasheet. For purposes of conversation, you can approximate the RLD amp like an ideal op-amp you learned about in a circuit theory class in school (i.e. infinite open loop gain, infinite input impedance, virtual input short). The RLDOUT pin is simply the output terminal of the amplifier, the RLDINV is the inverting input terminal. The RLDREF_INT bit in the CONFIG3 register controls what voltage will appear at the non-inverting input. If the bit is set, the mid-supply voltage will appear at the input. If it is cleared, then whatever voltage you feed will appear there. That voltage is important since it is the reference voltage that the amplifier will correct its output to. Since you said you want to use mid-supply as your common mode voltage, then I’d recommend setting that bit. For the sake of conversation, let’s assume from here on out that you’ve done that and that the amplifier reference voltage is mid-supply.

     

    If both the RLD_SENSP and RLD_SENSN registers are configured to be 0x00, then all of the switches in the diagram of the form “RLDXP” or “RLDXN” will be open. In this configuration, the amplifier is simply a unity gain buffer since the output will follow the mid-supply voltage since the inverting input is not being actively driven and the loop is closed. Use this configuration if you simply wish for the RLDOUT pin to provide a buffered mid-supply voltage. In some applications, this may be sufficient to keep the patient common mode voltage within the valid common mode range for the device.

     

    To understand the functionality of the common mode feedback system, some more circuit analysis is required. For the sake of simplicity, imagine that all voltages are DC and so the feedback capacitor C_EXT is irrelevant for this discussion (in reality, it will affect the damping of your system). Also ignore the PGAs from all the channels and imagine that on the source sides of all of the RLDXP and RLDXN switches are just voltage sources V1, V2, V3, …. We are looking to find some voltage Vo that is a function of V1, V2, V3, … which  is the classic op-amp circuit analysis question.

     

    We can make the assumption that the inputs of the amplifier are virtually shorted to mid-supply (for the sake of simplicity, let’s call that voltage “ground”). The current then flowing towards the output through the feedback loop, I_f, = –Vo/R_EXT since the non-inverting input is a virtual ground. Since the amplifier input impedance is (ideally) infinite, then all that current must be drawn from our sources V1, V2, V3, …. In that case we can say that the sum of the input currents is equal to the feedback current: I_f = I1 + I2 + I3 + … Those source currents can be calculated since the non-inverting input voltage is known. I1 = V1/220k, I2 = V2/220k, I3 = V3/220k, etc. The feedback current is I_f = (V1 + V2 + V3 + ….)/220k. Thus, returning to our original observation, the output voltage is Vo = -(V1 + V2 + V3 + …)*R_EXT/220k.

     

    This is really saying that the output will be the inverted sum of the inputs multiplied by some gain determined by R_EXT/220k. Since all the inputs are ideally differential with respect to the common mode (i.e. V1 = IN1P, V2 = IN1N), then the sum of the voltages in steady state is zero. The speed with which the amplifier corrects for detected variations in the common mode voltage is determined by your choice in R_EXT and C_EXT. That is a matter of control theory and requires too much depth for this thread. You can experiment with different values and find the right ones for your application.

     

    In terms of choosing which inputs to feed to the inverting terminal of the RLD amplifier, I would set the bits for RLD3P, RLD3N, RLD2P, RLD2N in the RLD_SENSP and RLD_SENSN registers since you are using both channels 2 and 3 inputs. Like I said above, though, using that functionality may not be necessary for your application, depending on how noisy the application environment will be. I hope this clears things up, let us know if you have any more questions.

     

    Regards,

    Brian Pisani

  • Thank you very much Brian,
    I get it now.