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ADC12J4000EVM + TSW14J56EVM, decimate-by-4

haertlms
Prodigy 100 points
Other Parts Discussed in Thread: ADC12J4000EVM

Hello,

I am using the ADC12J4000EVM together with the TSW14J56 Rev B EVM board. The Software I use is the ADC12J4000EVM GUI V1.3 and the HSDC Pro V3,0.

I use the On-board clock source with Fs = 3760 Msps. In Bypass Mode everything works fine. Also in Decimate-by-10; DDR and Decimate-by-20; SDR I am able to capture the single tone I am generating with a signal generator.

But if I try  Decimate-by-4; DDR or Decimate-by-8; DDR/SDR (with and without the P54 option) it doesn´t work. I always get  the Error "Read DDR to file TIMED_OUT_ERROR Time Out error".

Thanks,

Markus

  • 0
    TI__Mastermind 44680 points

    Hi Markus

    It should be possible to get good captures in Decimate-by-4; DDR; P54 enabled and Decimate-by-8; DDR/SDR; P54 enabled modes, but you will need to change one setting in the EVM GUI to get things working.

    After configuring the ADC EVM and clicking on the Program Clocks and ADC button, do the following:

    1. Navigate to the JESD204B/DDC control tab.
    2. Click on the JESD204B Block Enable button to turn off the JESD204B transmitter.
    3. Click on the K-1 Frames per Multiframe slider to change the K value from 23 to 24.
    4. Click on the JESD204B Block Enable button to turn the JESD204B transmitter back on.

    In the HSDC Pro GUI initiate a capture. Things should now work. If you still get a  DDR timeout error try clicking on Instrument Options>Reset Board and then try capturing again.

    The problem is occuring because there is a mismatch between the ADC EVM GUI configured K value and that of the HSDC Pro receive K value. I'm working on a revision to the ADC EVM GUI to resolve this issue.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 100 points

    Hi Jim,

    thank you for your fast response. The way you described worked for me.

    Best regards,
    Markus