tvp5158 and DM6467

zhencheng liang

Other Parts Discussed in Thread: TVP5158

Hi,

I have two question about tvp5158 and the mcasp of DM6467.

1) When I set reg c0h of the tvp5158 through i2c,I found set 00h(16k) and 10h(8k), the pin LRCLKR output is always 16KHz.

I can readback the value of reg c0h, although it's 10h,but output LRCLKP output is 16KHz.

When I set BCLK_R_Freq,the BCLK output is 64fs(1MHz) or 256fs(4MHz).

How to output 8K sample rate?

2)I wirite a simple driver for tvp5158 audio on the DM6467.I test the recording through AXR0[0] of the DM6467,

but found no data detect in the rxbuf.

The reg setting in tvp5158:

0x10, 0x88, 0x88, 0x68, /* C0 */ //i2s master SD_R only 64fs 16bit mode 8k sample
0x01, 0x00, 0x00, 0x00, /* C4 */

0x00, /* C8 */

The reg setting in DM6467:

offset is from 00 to f0

0x100102 0x0 0x0 0x0
0x0 0x0 0x0 0x2c000001
0x0 0x0 0x0 0x0
0x91 0x0 0x0 0x0
0x0 0x1f 0x0 0x0
0x0 0x0 0x0 0x0
0x1f 0xffff 0x8074 0x200
0x80 0x8000 0xf 0x0
0x104 0x0 0x0 0x0
0x0 0x0 0x0 0x0
0x1f 0xffff 0x74 0x0
0x0 0x8000 0x0 0x0
0x10c 0x17f 0x0 0x0
0x0 0x0 0x0 0x0
0x0 0x0 0x0 0x0

func : 0

dir: 0

gblctl: 0x1f

gblxctl: 0x1f

rxstat: 0x104 //not data detected

rx buf : 0x0 //always 0

What's wrong about the above setting?

Any help is welcomed.

Thanks.

zcliang

over 15 years ago

0 Paul.Yin over 15 years ago

TI__Genius 14405 points

For the MCASP question, can you probe and make sure there is signal coming to DavinciHD? If you don't see signal, you need to debug TVP5158

0 Adam Zhao over 15 years ago in reply to Paul.Yin

Prodigy 15 points

Yes, the signal is connected to DM6467HD EVM,

and the signal connections are

DM6467 TVP5158

McASP0_ACLKR ---> BCLK_R(pin85)

McASP0_FSR ---> LRCLK_R(pin86)

McASP_AXR[0] ---> SD_R(pin88)

0 Paul.Yin over 15 years ago in reply to Adam Zhao

TI__Genius 14405 points

I will let the TVP experts comment on this.

What I meant was, when you are receiving audio, make sure you can see the signals on the AXR pins (use Oscope). Then you can worry about whether you are programming McASP right. If you don't see audio signals, debug TVP until you see the signals, and then debug McASP if needed.

0 Viet Dinh over 15 years ago

TI__Genius 15310 points

Hello ZhenChang,

When we test the driver, we use DSP TDM mode. We test the I2S with stand alone EVM board. Can you tell me which mode are you using on DM6467? Are you using our TVP5157/DM6467 driver code as a baseline?

Regards,

Viet

0 zhencheng liang over 15 years ago in reply to Viet Dinh

Intellectual 330 points

I use the i2s mode, tvp5158 is master ,dm6467 is slave.

I use my driver code for testing,as mcvip_test.out run error on my board.

Now I can record something through tvp5158 ,but still have a question : why my tvp5158 can not output 8k

sample rate?

0 Viet Dinh over 15 years ago in reply to zhencheng liang

TI__Genius 15310 points

Hello Zhencheng,

I just checked the I2S mode in the lab with the TVP5158 EVM. I got both 8Khz and 16Khz come out Ok. Can you prob the R44 (LRCLK_R audio output) on the EVM to see if it is 8Khz or 16Khz? Beside setting C0h to 02h, I also have C3h set to E0h.

Regards,

Viet

0 zhencheng liang over 15 years ago in reply to Viet Dinh

Intellectual 330 points

Thanks , Viet,

I am stupid. I should set C0h to 02h not to 10h.it can output 8kHz sample rate now.

Cound you help me again? Just spend some minutes. I write a driver on linux-2.6.32 .When I run my code, I get the data my record with a lot

noise. I don't have the tvp5158 evm board, so I want you can test my code on your board.

I don't know how to upload file to this forum.Could you send me a email? I send the uImage to you.

My email is zcliangustc@163.com.

Please give me a hand.

Thanks again.

zcliang

0 James Nave over 15 years ago in reply to zhencheng liang

TI__Expert 6120 points

Hello zchiang,

Excessive noise is usually caused by the McBSP data delay being set incorrectly.

Also, you can order a TVP5158 EVM at the following web site.

http://focus.ti.com/docs/toolsw/folders/print/tvp5158evm.html

Regards,

Jim

The TVP5158 audio data is delayed two BCLK cycles from the rising edge of the frame sync pulse. Therefore, the McBSP data delay should be set to 2 bits rather than 0 bits. Using a setting of 0 bits would make the audio extremely noisy.

0 zhencheng liang over 15 years ago in reply to James Nave

Intellectual 330 points

Thanks Jim,

The problem has been resolved.

zcliang

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tvp5158 and DM6467