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ADS1256 fast cycling

Hi

I'm working with the ADS1256EVM board. Right now I have the ADC working with my DSP (DSPIC33FJ256GP506).
I need to cycle 3 channels and the output sampling rate must be at least 1000 SPS each, so 3000 SPS in total.
My problem is that when I have to change the MUX register, I'm loosing too much time, so I'm not able to have more than 2.232 kHz. I'm cycling the channels in the follwoing way:

   //Change MUX register
    switch(adcSelChannel)
      {
      case 0x01: adsWriteReg(ads_REG_MUX, ads_MUX_CH2, 1); break;
      case 0x02: adsWriteReg(ads_REG_MUX, ads_MUX_CH3, 1); break;
      case 0x03: adsWriteReg(ads_REG_MUX, ads_MUX_CH1, 1); break;
      default: break;
      }
  
    //Send SYNC command to restart conversation
    adssync(1);
   
    //WAKEUP command
    adswakeup(1);
   
    //RDAT command to read data from ADC
    adsrdata(1);

    //Receive 24 bit Data
    spi1Ctrl(spiCTRL_RECEIVE, 1, 3);

So Is it possible to reach the 3000 SPS? According to the datasheet I should be able to get a cycling throughput of 4374 Hz, which would be enought. So what am I doing wrong? Below you can see a scope picture, this was recorded with a ADC sampling rate of 7500 Hz, you can also see the throughput rate of 2.232 kHz.

 

Thans for any help!

Stephen

  • Stephen, 

    The data rate settings that are found throughout the data sheet are for conversion of a single channel. The multiplexer cycling throughput is found on page 21 of the data sheet. If you follow the steps on page 21 of the data sheet, also shown in Figure 19, you should be able to reach the cycling throughput rate in Table 14, assuming you are using a 7.68MHz Fclk. If you are using the steps in the data sheet and are still unable to achieve the desired speed, below are a couple things to check: 

    - First thing, have you verified that you have set the ADC to a 7500SPS data rate? Setting the ADC to 3750SPS data rate is only a one bit difference than 7500SPS.

    - Have you also tried to increase the Data Rate to 15,000 SPS or 30,000 SPS to increase the cycling throughput to see if you can meet your desired cycling throughput? 

     - Are you using a 7.68MHz Fclk? The values in Table 14 are only valid if you are using a 7.68MHz Fclk. 

     

    Regards,

    Tony Calabria