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ADS8568/ADS8548/ADS8528

Manfred Schleusener
Prodigy 10 points
Other Parts Discussed in Thread: ADS8568, ADS8548, ADS8528

Hello TI,

I have some Problems to understand the parallel Timing of this three ADCs...

Looking to page 11 of the data sheet, the total 'convertion time' is the sum of tCONV and tACQ, which is for the ADS8568 1.7 µsec + 280 nsec = 1.98 µsec = 505 kHz (and NOT 510 kHz like written at the first page of the data sheet.

For the ADS8548 it is 1.45 µsec + 280 nsec = 1.73 µsec = 578 kHz (and NOT 600 kHz like written at the first page of the data sheet.

For the ADS8528 it is 1.33 µsec + 280 nsec = 1.61 µsec = 621 kHz (and NOT 650 kHz like written at the first page of the data sheet.

Are the informations at the first page wrong, or did I understood something complete wrong?

Best Regards,

Manfred

  • 0
    TI__Guru**** 181021 points

    Hi Manfred!

    Welcome to the e2e forum and Thank You for posting this great question!

    The conversion time numbers shown on page 11 are based on the maximum number of clock cycles, which is 20, required to complete the conversion process.  If you use an external conversion clock and have the ability to synchronize the CONVST input, you can complete the conversion process in the minimum 19 clock cycles shown in the top of the tCONV row.  This gets you to the data rate numbers on page one of the ADS8528, ADS8548 and ADS8568 data sheet.