This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS4225 in CMOS mode

Other Parts Discussed in Thread: ADS4225

Hi,

I would like to use the ADS4225 in CMOS mode but i need the output clock to be available at startup. Is it possible to start the device in CMOS mode while keeping the serial interface available?


Thanks,

Christophe

  • Chistophe,

    If you follow the guide lines on page 24 and 25 of the data sheet, this should meet your requirements.

     

    USING BOTH SERIAL INTERFACE AND PARALLEL CONTROLS

    For increased flexibility, a combination of serial interface registers and parallel pin controls (CTRL1 to CTRL3)

    can also be used to configure the device. To enable this option, keep RESET low. The parallel interface control

    pins CTRL1 to CTRL3 are available. After power-up, the device is automatically configured according to the

    voltage settings on these pins (seeTable 7). SEN, SDATA, and SCLK function as serial interface digital pins and

    are used to access the internal registers of the ADC. The registers must first be reset to the default values either

    by applying a pulse on the RESET pin or by setting the RESET bit to '1'. After reset, the RESET pin must be kept

    low. The Serial Register Map section describes register programming and the register reset process in more

    detail.

    Regards,

    Jim

     

  • Hi Jim,

    My problem is that the device configuring the AD relies on the AD output clock to be running in CMOS mode. If I understand the datasheet correctly, I see 2 problems:

    1- To start the device in CMOS mode, I need to hold SEN to GND when RESET is set to '1'. But it does not say what to do with the reset signal afterwards. Is it just a start-up sampling of both the RESET and SEN pins that decide on the output mode.

    2- To use the internal registers later on, they need to be reset first which will set the device back to default LVDS output.

    Regards,
    Christophe
  • Christophe,

    From what I can tell your only option is to either provide another clock for your SPI, or use the part in a parallel interface mode. I do not see a way to enable the output CMOS clock after reset unless you do a SPI write.

    Regards,

    Jim 

  • Thank you Jim.

    Regards,
    Christophe