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Query DAC8568

VT
Genius 3300 points

Other Parts Discussed in Thread: DAC8568

1. Any sample code in C for DAC8568?

2. What SPI mode is used? Is it SPI0 or SPI1?

  • 0
    TI__Genius 11750 points

    Howdy Vindhyachal Takniki,

    DAC8568 uses a versatile 3-wire serial interface that is compatible with SPI protocol.  You can probably query the micro-controller forum for any SPI examples or library files.

    Page 7 of the DS illustrates a standard serial write operation.  As you may know SPI has 4 different settings, based on the clock phase and polarity.  The illustration indicates that the clock polarity can be set to 0 or 1, for a respective base value of low voltage or high.  Data is captured on the clock's falling edge.


    Therefore, the SPI Clock polarity and phase can either be:

         CPOL (Clock polarity) = 0 and CPHA (Clock Phase) = 1

                                                        or

        CPOL =1 and CPHA = 0

    Best Regards,

    Matt

  • 0 in reply to Matthew Sauceda
    Genius 3300 points

    I have tried following sequence & it is working on device.
    Can you plz check if sequence is correct or not?

    void configure_dac8568(void)
{
/* enable software control of ldac */
__delay_cycles_us(10000);
CS_enable();
__delay_cycles_us(100);
send_spi_byte(0x06);
send_spi_byte(0x00);
send_spi_byte(0xff);
send_spi_byte(0xff); 
__delay_cycles_us(100);
CS_disable(); 


/* power up all dac at once */
__delay_cycles_us(10000);
CS_enable();
__delay_cycles_us(100);
send_spi_byte(0x04);
send_spi_byte(0x00);
send_spi_byte(0x00);
send_spi_byte(0xff); 
__delay_cycles_us(100);
CS_disable();


/* intrenal ref on only when required */
__delay_cycles_us(10000);
CS_enable();
__delay_cycles_us(100);
send_spi_byte(0x08);
send_spi_byte(0x00);
send_spi_byte(0x00);
send_spi_byte(0x01);
__delay_cycles_us(100);
CS_disable(); 


/* full on all data registers */
__delay_cycles_us(10000);
CS_enable();
__delay_cycles_us(100);
send_spi_byte(0x02);
send_spi_byte(0xff);
send_spi_byte(0xff);
send_spi_byte(0xf0); 
__delay_cycles_us(100);
CS_disable(); 

}

  • 0 in reply to VT
    TI__Genius 11750 points
    Thanks for the update. Rather than debugging and interpreting code, would you happen to have any oscilloscope captures of the SPI transaction, this will allow me to verify if the transaction is indeed correct or not. Since you are able to communicate with the part I'm fairly certain that you have the correct mode of operation, but double checking wouldn't hurt.

    Matt
  • 0 in reply to VT
    TI__Genius 11750 points
    As for the sequence, it is mostly dependent on the way you wish to configure the device. The sequence you have listed above will control LDAC through software, as well as using the internal reference in static mode. You writes are correct in terms of sequence as you are ensuring that all channel are set for SW LDAC before enabling all DAC outputs (A-H). The DAC outputs are also set to a specific broadcast mode, which will write to all DAC input registers and additionally update all DAC registers by issuing a SW LDAC.

    Matt