I'm wondering if I can synchronize conversions on 6 ADS1220's by asserting all chip selects and sending a start command, then de-asserting all the select lines?
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I'm wondering if I can synchronize conversions on 6 ADS1220's by asserting all chip selects and sending a start command, then de-asserting all the select lines?
Hi James,
This can work, but there are a couple of issues to consider. The first is DOUT. If DOUT from each device is tied together and all devices are made active by CS going low, then you will have output driver contention. You could use some type of glue logic, or control signal to deactivate the DOUT lines by using a tri-state buffer on the DOUT lines in the condition where you have multiple devices with CS low at the same time.
Another consideration is the actual timing. If you have a common CLK line to each of the devices the synchronizaton will work much better. However if the internal oscillator is used, then the devices can vary with respect to when the actual conversion will complete. The variance can be as much as +/-2% from nominal. You will either have to monitor each of the device's DRDY or allow sufficient time for any oscillator variance before reading from the devices.
One other consideration is with respect to internal timing. Even if the CLK is common to all devices, there may be a 2 modulator clock period difference between devices due to internal clock phase variance within the internal clock dividers.
Best regards,
Bob B