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Power Sequencing of ADC128S102

Other Parts Discussed in Thread: ADC128S102

We have an existing design that uses several of the ADC128S102 analog to digital converters.  It has recently come to our attention that it is possible that the power sequencing requirement that the analog supply, VA, come up before the digital supply, VD, may not be met.  It is possible for the VD to be applied for an indefinite time (minutes to hours or more) before the VA is applied.  Both are nominally 3.3V when active, but are derived from separate regulator circuits.  To date, we have not experienced any unusual operation of the devices when the digital supply was powered on first, but need to decide whether the design needs to be modified to ensure the power sequencing requirements are met.  Can you please provide additional information on the reasons for the power sequencing requirement in the datasheet, and under what conditions it may result in impaired performance or failure of the part?  We do have the ability to prevent initiating any conversions until the analog supply is present without any hardware modifications.  Modifying the hardware at this stage is possible but difficult.

Based on this statement from the datasheet, the ESD diodes appear to only be turned on if a conversion is initiated while VA is powered down:

 

"To avoid turning on the ESD diodes, the digital supply (VD) cannot exceed the analog supply (VA) by more than 300mV, during a conversion cycle"

 

Is this the case?  If so, would this risk be reduced as long as no conversions are initiated while VA is low?  Are there any other risks we should consider?

Thank You.

  • I should also add that SCLK and DIN have external 10K pull downs and CS_N has an external 10K pull up to VD.
  • Hi Brian

    I apologize for the delayed response to your questions.

    Since this product is one of TI's Precision Data Converters I am moving the thead to that forum. I will follow up with that team and make sure they respond as soon as possible.

    Best regards,

    Jim B

  • Unfortunately VD has an ESD protection diode that connects it to VA but I would not panic just yet.  you mention that no conversion occurs when VA is powered down, so that is good.  The only thing we need to be concerned about is charging the VA bypass capacitors through the ESD diode.  I am assuming VA is not powered by a source that grounds it's output when it is not enabled.  Some bench supplies have this feature and this would definitely be catastrophic. 

    do you know the ramp rate of the VD supply when it gets turned on and VA is off.  if we know the ramp rate and the value of bypass capacitance connected to VA and VD, you can estimate how much current is passing through the ESD diode.  I mention all of this so we can judge our confidence regarding damage to the ESD diode.  if this were a new design and the board were not already done, I would have recommended an external schottky diode to route the current from VD to VA outside of the chip.

    Chuck

  • VA is provided by a voltage regulator that appears to set Vout to Hi-Z using a power PMOS as shown below when the output is disabled or Vin is low.  The functional block diagram for the regulator is below.  It does not appear the "catastrophic" case is a concern.

    There are two ADCs in the configuration shown below that have a 3.3uF and a 100nF capacitor directly on the VA pin.  There is a ferrite bead in series with the analog power supply that (hopefully) should limit the peak current to the additional bypass capacitors on the analog voltage plane when VD is switched on.  There is about 1110.55 uF of total capacitance on the other side of the ferrite beads.  This consists of 1100 uF from low ESR tantalums and 10.55 uF from an assortment of ceramics.

    I will find and post more information for the ferrite bead and VD ramp rate shortly.

  • VD comes up from 0V to 3.3V with a time constant of about 5msec. Based on the steepest part of the curve, and assuming the bead has no effect, the estimated peak current is about:

    I_peak = (1110.55uF)*(2.0V)/(5.0msec) = 444.22mA

    For just the bypass caps directly on VA, we have: (3.4uF)*(2.0V)/(5.0msec) = 1.36mA

    The ferrite bead is similar to an HRB0805S300 made by AEM. From the datasheet, the equivalent inductance at frequencies consistent with the VD risetime is about 130nH with a series resistance of less than 0.02 ohms.
  • thanks for the info
    I am trying to find info about our ESD diode structure. Once I have this, I will get back to you with my thoughts.
    I am going to send you a friend request so we can take this discussion offline going further.
    Chuck