Dear all,
I'm reading the datasheet of DAC2932, which is a "dual, 12-bit, 40MSPS, Digital-to-Analog Converter".
In "Timing Requirements I-DAC" on Page 6, the parameter tCP (Clock cycle time (period)) has a typical value of 25ns, which translates to a frequency of 40MSPS. It does not specify a maximum tCP (or a minimum clock frequency).
I'm just wondering, if I can use this DAC statically. I mean, if I can latch the parallel data input [D11:D0] only once, and have the DAC retain the current ever since without feeding it a clock to update the parallel data input?
Essentially it will depend on how the latch is implemented in the DAC. If it is a dynamic latch, it will need constant update, otherwise the data will fade. If it is a static latch, even without being refreshed, the data will retain, hence the output current too.
The datasheet is available here: http://www.ti.com/lit/ds/symlink/dac2932.pdf
I'll be extremely grateful if you can answer my question. Thank you!
BR,
