ADS1194 - External Clock Source

Hiroshi Katsunaga

Mastermind 6480 points

Other Parts Discussed in Thread: ADS1194

Hello,

My customer have some questions about ADS1194.

They examine ADS1194 as simultaneous sampling ADC.

They want to use external clock.

Their conditions are as follows.

(Case A) fs=10SPS, Decimation=1/1024 -> fmod=10.24k -> fclk=163.84kHz

(Case B) fs=300SPS, Decimation=256 -> fmod=76.8k -> fclk=1.2288MHz

(Case C) fs=5kSPS, Decimation=16 -> fmod=80k -> fclk=1.28kHz

[Q1]

Can they use CDCE(L)9xx as the clock source ?

I am worried about whether or not to meet the requirement of the clock jitter.

[Q2]

Do you have the specification with respect to the input level of the external clock input ?

Best Regards,

Hiroshi Katsunaga

over 10 years ago

0 Brian Pisani over 10 years ago

TI__Mastermind 38745 points

Hello Katsunaga-san,

Unfortunately they will only be able to do Case B with the ADS1194. Referring to page 5 of the ADS1194 datasheet, acceptable external clock frequencies range from 500 kHz to 2.25 MHz. We cannot guarantee performance at clock frequencies beyond those limits. Now to answer your questions:

1. I believe they will be able to use that clock source. From looking at the datasheet, it has a jitter in the range from 50 ps to 100 ps which will produce noise whose level is well beneath the device's noise floor.

2. The clock input is a digital input and will in turn follow the logic level specifications for other digital I/Os on the device.

Regards,
Brian Pisani

0 Hiroshi Katsunaga over 10 years ago in reply to Brian Pisani

Mastermind 6480 points

Hi Brian,

Thank you for your fast response.
I understood your comments.

Thank you for your support!

Best Regards,
Hiroshi Katsunaga

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ADS1194 - External Clock Source